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參數(shù)資料
| 型號： | MAX4612CUD+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 9/11頁 |
| 文件大小： | 0K |
| 描述： | IC SWITCH QUAD SPST 14TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 功能： | 開關(guān) |
| 電路： | 4 x SPST - NC/NO |
| 導(dǎo)通狀態(tài)電阻： | 100 歐姆 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 2 V ~ 12 V |
| 電流 - 電源： | 1µA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-TSSOP |
| 包裝： | 帶卷 (TR) |
Applications Information
Power-Supply Sequencing
and Overvoltage Protection
Do not exceed the absolute maximum ratings, because
stresses beyond the listed ratings may cause permanent
damage to the devices.
Proper power-supply sequencing is recommended for all
CMOS devices. Always apply V+ before applying analog
signals or logic inputs, especially if the analog or logic
signals are not current limited. If this sequencing is not
possible, and if the analog or logic inputs are not current
limited to 20mA, add a small-signal diode (D1) as shown
in Figure 1. If the analog signal can dip below GND, add
D2. Adding protection diodes reduces the analog signal
range to a diode drop (about 0.7V) below V+ (for D1),
and to a diode drop above ground (for D2). Leakage is
unaffected by adding the diodes. On-resistance increas-
es by a small amount at low supply voltages. Maximum
supply voltage (V+) must not exceed 13V.
Adding protection diodes causes the logic thresholds to
be shifted relative to the power-supply rails. This can be
significant when low supply voltages (+5V or less) are
used. With a +5V supply, TTL compatibility is not guar-
anteed when protection diodes are added. Driving IN1
and IN2 all the way to the supply rails (i.e., to a diode
drop higher than the V+ pin, or to a diode drop lower
than the GND pin) is always acceptable.
MAX4610/MAX4611/MAX4612
Low-Voltage, Quad, SPST
CMOS Analog Switches
_______________________________________________________________________________________
7
POSITIVE SUPPLY
COM_
NO_
Vg
V+
MAX4610
MAX4611
MAX4612
Figure 1. Overvoltage Protection Using Two External Blocking
Diodes
Pin Description
PIN
MAX4610
MAX4611
MAX4612
TSSOP/SO/ DIP
QFN
TSSOP/SO/DIP
QFN
TSSOP/SO/DIP
QFN
NAME
FUNCTION
1, 3, 8, 11
1, 3,
8, 11
—
NO1–NO4
Analog Switch Normally Open
Terminals
—
1, 3, 8, 11
1, 3,
8, 11
—
NC1–NC4
Analog Switch Normally Closed
Terminals
—
1, 8
NO1, NO3
Analog Switch Normally Open
Terminals
—
3, 11
NC2, NC4
Analog Switch Normally Closed
Terminals
2, 4, 9, 10
2, 4,
9, 10
2, 4, 9, 10
2, 4,
9, 10
2, 4, 9, 10
2, 4,
9, 10
COM1–COM4
Analog Switch Common
Terminals
13, 5, 6, 12
14, 5,
6, 13
13, 5, 6, 12
14, 5,
6, 13
13, 5, 6, 12
14, 5,
6, 13
IN1–IN4
Logic-Control Digital Input
7
GND
Ground. Connect to digital
ground.
—
12, 15
—
12, 15
—
12, 15
N.C.
No Connection. Not internally
connected.
14
16
14
16
14
16
V+
Positive Analog and Digital-
Supply Voltage Input. Internally
connected to substrate.
—
EP
Exposed Pad (QFN only).
Connect to V+.
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