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    參數(shù)資料
    型號: MAX4588CAI
    廠商: MAXIM INTEGRATED PRODUCTS INC
    元件分類: 運動控制電子
    英文描述: 16/32-Bit RISC Flash Microcontroller 144-LQFP
    中文描述: DUAL 4-CHANNEL, VIDEO MULTIPLEXER, PDSO28
    封裝: 5.30 X 0.65 MM, SSOP-28
    文件頁數(shù): 13/20頁
    文件大?。?/td> 306K
    代理商: MAX4588CAI
    Detailed Desc ription
    Logic -Level T ranslators
    The MAX4588 is constructed of high-frequency “T”
    switches, as shown in Figure 8. The logic-level inputs
    are translated by amplifier A1 into a V+ to V- logic sig-
    nal that drives amplifier A2. Amplifier A2 drives the
    gates of N-channel MOSFETs N1 and N2 from V+ to V-,
    turning them fully on or off. The same signal drives
    inverter A3 (which drives the P-channel MOSFETs P1
    and P2, turning them fully on or off) from V+ to V-, and
    turns the N-channel MOSFET N3 on and off. The logic-
    level threshold is determined by V
    L
    and GND.
    S witc h On Condition
    When the switch is on, MOSFETs N1, N2, P1, and P2
    are on and MOSFET N3 is off (Figure 8). The signal
    path is COM_ to NO_, and because both N-channel
    and P-channel MOSFETs act as pure resistances, it is
    symmetrical (i.e., signals may pass in either direction).
    The off MOSFET, N3, has no DC conduction, but has a
    small amount of capacitance to GND. The four on
    MOSFETs also have capacitance to ground that,
    together with the series resistance, forms a lowpass fil-
    ter. All of these capacitances are distributed evenly
    along the series resistance, so they act as a transmis-
    sion line rather than a simple R-C filter. The MAX4588’s
    construction allows an exceptional 180MHz bandwidth
    when the switches are on.
    Typical attenuation in 75
    systems is 2.5dB and is rea-
    sonably flat up to 50MHz. Higher-impedance circuits
    show even lower attenuation (and vice versa), but
    slightly lower bandwidth due to the increased effect of
    the internal and external capacitance and the switch’s
    internal resistance.
    M
    Low-Voltage, High-Isolation,
    Dual 4-Channel RF/Video Multiplexer
    ______________________________________________________________________________________
    13
    A1
    A2
    A3
    P1
    N3
    N1
    V-
    GND
    INPUT
    V
    CC
    V+
    V+
    V+
    COM_
    NO_
    N2
    P2
    NORMALLY OPEN SWITCH CONSTRUCTION
    ESD DIODES
    ON GND, NO_,
    AND COM_
    t
    CSS
    CS
    SCLK
    DIN
    DOUT
    NOTE: ALL INPUT SIGNALS ARE SPECIFIED WITH t
    R
    AND t
    F
    < 10ns.
    TIMING IS MEASURED FROM 50% OF DIGITAL SIGNAL.
    t
    DS
    t
    DH
    A0
    A1
    A2
    DISABLE
    t
    DO
    t
    CH
    t
    CL
    t
    CSH
    MAX4588
    Figure 7. Serial Timing Diagram
    Figure 8. T-Switch Construction
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