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參數(shù)資料
| 型號： | MAX4533EAP |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Quad, Rail-to-Rail, Fault-Protected, SPDT Analog Switch |
| 中文描述： | QUAD 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO20 |
| 封裝： | SSOP-20 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 172K |
| 代理商： | MAX4533EAP |
During normal operation of a conducting channel, N1
and P1 remain on with a typical 125
on-resistance
between NO_ (or NC_) and COM_. If the input voltage
exceeds either supply rail by about 150mV, the parallel
combination switches (N1, P1) are forced off through
the driver and sensing circuitries. At the same time, the
output (COM_ ) is clamped to the appropriate supply
rail by the clamp circuitries (N2, P2). Two clamp circuits
limit the output voltage to the supply voltages.
For simplicity, Figure 1 shows only one side of the SPDT
switch configuration. The complete circuit is composed
of two channels with their outputs connected.
Normal Operation
Two comparators continuously compare the voltage on
the NO_ (or NC_ ) pin with V+ and V- supply voltages.
When the signal on NO_ (or NC_ ) is between V+ and
V-, the switch behaves normally, with FETs N1 and P1
turning on and off in response to NO_ (or NC_) signals
(Figure 1). For any voltage between the supply rails,
the switch is bidirectional; therefore, COM_ and NC_
(or NO_ ) are interchangeable. Only NO_ and NC_ can
be exposed to overvoltages beyond the supply range
and within the specified breakdown limits of the device.
Fault Condition
The MAX4533 protects devices connected to its output
(COM_) through its unique fault-protection circuitry.
When the input voltage is raised above either supply
rail, the internal sense and comparator circuitries (N3
and N-channel driver or P3 and P-channel driver) dis-
connect the output (COM_) from the input (Figure 1).
If the switch driven above the supply rail has an on
state, the clamp circuitries (N2 or P2) connect the out-
put to the appropriate supply rail. Table 1 summarizes
the MAX4533’s operation under normal and fault condi-
tions. Row 5 shows a negative fault condition when the
supplies are on. It shows that with supplies of ±15V, if
the input voltage is between -15V and -25V, the output
(COM_) clamps to the negative supply rail of -15V.
With this technique, the SPDT switch is capable of with-
standing a worse-case condition of opposite fault polar-
ities at its inputs.
T ransient Fault Condition
When a fast rising or falling transient on NO_ (or NC_)
exceeds V+ or V-, the output (COM_) follows the input
(IN_) to the supply rail by only a few nanoseconds. This
delay is due to the switch on-resistance and circuit
capacitance to ground. However, when the input tran-
sient returns to within the supply rails there is a longer
recovery time. For positive faults, the recovery time is
typically 2.5μs. For negative faults, the recovery time is
typically 1.3μs. These values depend on the COM_ out-
put resistance and capacitance. The delays are not
dependent on the fault amplitude. Higher COM_ output
resistance and capacitance increase the recovery
times.
Fault Protec tion, V oltage, and Power Off
The maximum fault voltage on the NO_ or NC_ pins is
±40V from ground when the power is off. With ±15V sup-
ply voltages, the highest voltage on NO_ (or NC_) can
be +25V, and the lowest voltage on NO_ (or NC_) can
be -25V. Exceeding these limits can damage the chip.
IN_ Logic-Level Thresholds
The logic-level thresholds are TTL/CMOS-compatible
when V+ is +15V. Raising V+ increases the threshold
slightly; when V+ reaches +25V, the level threshold is
2.8V—higher than the TTL output high-level minimum of
2.4V, but still compatible with CMOS outputs (see the
Typical Operating Characteristics).
Increasing V- has no effect on the logic-level thresh-
olds, but it does increase the gate-drive voltage to the
signal FETs, reducing their on-resistance.
M
Quad, Rail-to-Rail, Fault-Protec ted,
S PDT Analog S witc h
_______________________________________________________________________________________
9
-15V
-15V
+15V
P-CHANNEL
DRIVER
N-CHANNEL
DRIVER
+15V
N3
P3
INPUT
NC_
or
NO_
N1
CLAMP
OUTPUT COM_
CLAMP
+V(+15V)
-V(-15V)
N2
P2
P1
COMPARATOR
COMPARATOR
SENSE
SWITCH
SENSE
SWITCH
Figure 1. Simplified Internal Structure
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX4533EAP+ | 功能描述:模擬開關(guān) IC Quad Fault-Protected SPDT Analog Switch RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時間（最大值）: 關(guān)閉時間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
| MAX4533EAP+T | 功能描述:模擬開關(guān) IC Quad Fault-Protected SPDT Analog Switch RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時間（最大值）: 關(guān)閉時間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
| MAX4533EAP-T | 功能描述:模擬開關(guān) IC RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時間（最大值）: 關(guān)閉時間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
| MAX4533EPP | 功能描述:模擬開關(guān) IC RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時間（最大值）: 關(guān)閉時間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
| MAX4533EPP+ | 功能描述:模擬開關(guān) IC Quad Fault-Protected SPDT Analog Switch RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時間（最大值）: 關(guān)閉時間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
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