MAX4111/MAX4121/MAX4221
330MHz Buffered Video Switches/
Crosspoint Building Blocks
8
_______________________________________________________________________________________
__________Applications Information
Grounding, Bypassing,
and PC Board Layout
To obtain the full 330MHz bandwidth of these switches,
Microstrip and Stripline techniques are recommended.
To ensure your PC board does not degrade the
switch’s performance, it’s wise to design the board for
a frequency greater than 1GHz. Even with very short
runs, it’s good practice to use this technique at critical
points such as inputs and outputs.
Use the following guidelines when designing the board:
Do not use wire-wrap boards, because they are too
inductive.
Do not use IC sockets. They increase parasitic
capacitance and inductance.
In general, surface-mount components have shorter
leads and lower parasitic reactance, and give better
high-frequency performance than through-hole com-
ponents.
The PC board should have at least two layers, with
one side a signal side and the other a ground plane.
Keep signal lines as short and straight as possible.
Do not make 90° turns; round all corners.
The ground plane should be as free from voids as
possible.
Bypass Components—Capacitors
Surface-mount ceramic capacitors are recommended
to achieve good high-frequency bypassing. A 0.1F
capacitor in parallel with a 1000pF capacitor should be
used for each supply. The capacitors should be locat-
ed as close to the ICs supply pins as possible, with the
smaller value capacitor being closer to the IC than the
other.
Creating Larger Arrays
The MAX4111/MAX4121/MAX4221 were designed as
building blocks for larger arrays. The single-pole switch
allows the system designer much greater control over
crosstalk than multiple switches in a single IC. For this
reason, cable drivers have not been included in the
switch design because of the high-power drive
required (see Figure 6).
Even though the stability of these devices is not wors-
ened by adding capacitance, you may want to limit the
number of switches connected together. The
MAX4111/MAX4121/MAX4221 have a finite input capa-
citance of about 3pF and a dynamic output resistance
of about 20
. This causes a pole at a little more than
2.7GHz. However, in a large array with many switch
inputs, the total capacitance is N x 3pF, where “N” is
the number of switches connected in parallel. The pole
will be located at:
CSTRAY = Stray capacitance at the interconnect
If the maximum number of switches that may be con-
nected while still maintaining bandwidth is less than
your system requirements, use a unity-gain buffer
amplifier to isolate the switch from the remainder of the
inputs.
1
23
20
π
(
)
xN x
pF C
x
MHz
STRAY
+
Table 1. MAX4111 Truth Table
Table 2. MAX4121 Truth Table
Table 3. MAX4221 Truth Table
EN
OUT
0
High-Z
1
IN
A0
EN
OUT
X
0
High-Z
0
1
IN0
1
IN1
Note: SEL0 = SEL1 = 1 and/or SEL2 = SEL3 = 1 is not
allowed. Enabling these states will not damage the device,
but may cause excessive supply currents and distortion.
NA
1
IN3
1
0
IN2
0
1
High-Z
0
OUT1
SEL3
SEL2
NA
1
IN1
1
0
IN0
0
1
High-Z
0
OUT0
SEL1
SEL0