參數(shù)資料
型號: MAX4042EUA+T
廠商: Maxim Integrated Products
文件頁數(shù): 16/16頁
文件大小: 0K
描述: IC OP AMP R-R DUAL 8-UMAX
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
放大器類型: 通用
電路數(shù): 2
輸出類型: 滿擺幅
轉換速率: 0.04 V/µs
增益帶寬積: 90kHz
電流 - 輸入偏壓: 2nA
電壓 - 輸入偏移: 250µV
電流 - 電源: 14µA
電流 - 輸出 / 通道: 2.5mA
電壓 - 電源,單路/雙路(±): 2.4 V ~ 5.5 V,±1.2 V ~ 2.75 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 8-uMAX
包裝: 帶卷 (TR)
MAX4040–MAX4044
Single/Dual/Quad, Low-Cost, SOT23,
Micropower, Rail-to-Rail I/O Op Amps
_______________________________________________________________________________________
9
The MAX4040–MAX4044 family’s inputs are protected
from large differential input voltages by internal 2.2k
series resistors and back-to-back triple-diode stacks
across the inputs (Figure 2). For differential input volt-
ages (much less than 1.8V), input resistance is typically
45M
. For differential input voltages greater than 1.8V,
input resistance is around 4.4k
, and the input bias
current can be approximated by the following equation:
IBIAS = (VDIFF - 1.8V) / 4.4k
In the region where the differential input voltage
approaches 1.8V, the input resistance decreases expo-
nentially from 45M
to 4.4k as the diode block begins
conducting. Conversely, the bias current increases with
the same curve.
Rail-to-Rail Output Stage
The MAX4040–MAX4044 output stage can drive up to a
25k
load and still swing to within 60mV of the rails.
Figure 3 shows the output voltage swing of a MAX4040
configured as a unity-gain buffer, powered from a single
+4.0V supply voltage. The output for this setup typically
swings from (VEE + 10mV) to (VCC - 10mV) with a 100k
load.
Applications Information
Power-Supply Considerations
The MAX4040–MAX4044 operate from a single +2.4V to
+5.5V supply (or dual ±1.2V to ±2.75V supplies) and
consume only 10A of supply current per amplifier. A
high power-supply rejection ratio of 85dB allows the
amplifiers to be powered directly off a decaying battery
voltage, simplifying design and extending battery life.
Power-Up Settling Time
The MAX4040–MAX4044 typically require 200s to
power up after VCC is stable. During this start-up time,
the output is indeterminant. The application circuit
should allow for this initial delay.
R3
R3 = R1
R2
R1
R2
MAX4040–
MAX4044
VIN
Figure 1b. Minimizing Offset Error Due to Input Bias Current
(Inverting)
2.2k
2.2k
IN-
IN+
Figure 2. Input Protection Circuit
R3
VIN
R3 = R1
R2
R1
R2
MAX4040–
MAX4044
Figure 1a. Minimizing Offset Error Due to Input Bias Current
(Noninverting)
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