參數(shù)資料
型號(hào): MAX3991UTG+
廠(chǎng)商: Maxim Integrated Products
文件頁(yè)數(shù): 7/12頁(yè)
文件大?。?/td> 0K
描述: IC DATA RECOVERY W/AMP 24-TQFN
標(biāo)準(zhǔn)包裝: 75
類(lèi)型: 時(shí)鐘和數(shù)據(jù)恢復(fù)(CDR)
PLL:
主要目的: SONET/SDH.XFP 光學(xué)接收器
輸入: CML
輸出: CML
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 是/是
頻率 - 最大: 693.5MHz
電源電壓: 3 V ~ 3.6 V
工作溫度: 0°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 24-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 24-TQFN-EP(4x4)
包裝: 管件
MAX3991
10Gbps Clock and Data Recovery
with Limiting Amplifier
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(See Table 1 for operating conditions. Typical values at VCC = +3.3V, TA = +25°C, unless otherwise noted.)
Note 1:
Measured with 100mVP-P differential amplitude.
Note 2:
Guaranteed by design and characterization.
Note 3:
Measured from the time that the FCTL1 input goes high with FCTL2 = 0 to the time when the supply current drops to less
than 40% of the nominal value.
Note 4:
Measured with PRBS = 231 - 1.
Note 5:
Larger CFILT can be used to reduce jitter peaking at
≤ 120kHz. A larger CFILT will increase acquisition time. CFILT should
not exceed 200nF.
Note 6:
Measurement limited by test equipment.
Note 7:
Jitter tolerance is for BER
≤ 10-12, measured with additional 0.1UI deterministic jitter and 40mVP-P differential input.
Note 8:
Measured with 50kHz to 80MHz SONET filter.
Note 9:
Applies on power-up, after standby.
Note 10: Over process, temperature, and supply.
Note 11: Hysteresis is defined as 20Log(VLOS-DEASSERT /VLOS-ASSERT).
Table 2. Serial Data Rate and Reference Clock Frequency
APPLICATION
DATA RATE (Rb)
(Gbps)
/16 REFERENCE CLOCK
FREQUENCY (MHz)
/64 REFERENCE CLOCK
FREQUENCY (MHz)
OC-192 SONET – SDH64
9.95328
622.08
155.52
OC-192 SONET Over FEC
10.664
666.5
166.625
ITU G.709
10.709
669.3125
167.328125
10Gbps Ethernet, IEEE 802.3ae
10.3125
644.53125
161.1328125
10 Gigabit Ethernet Over ITU G.709
11.09573
693.483125
173.3707813
10Gbps Fibre Channel
10.51875
657.421875
164.355469
Table 1. Operating Conditions (Unless otherwise noted, FCTL1 = FCTL2 = 0.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Voltage
VCC
3.0
3.6
V
Ambient Temperature
TA
0
+85
°C
Input Data Rate
Rb
(See Table 2 )
Gbps
SDI± Differential Input Voltage Swing
VD
15
1000
mVP-P
Load Resistance
RL
RL is AC-coupled
50
REFCLK± Differential Input Voltage
Swing
300
1600
mVP-P
REFCLK Duty Cycle
30
70
%
Rb / 16
REFCLK Frequency
fREFCLK
Rb / 64
GHz
REFCLK Accuracy
Relative to Rb / 16 or Rb / 64
-100
+100
ppm
fREFCLK= Rb / 64
1200
REFCLK Rise/Fall Times (20% to
80%)
fREFCLK= Rb / 16
300
ps
REFCLK Random Jitter
Noise bandwidth < 100MHz
10
psRMS
Note: The part should be in standby mode when data rates are being switched.
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