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參數(shù)資料
| 型號： | MAX3971AUTP+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 5/9頁 |
| 文件大小： | 0K |
| 描述： | IC AMP LIMIT 10.7GBPS 20-TQFN |
| 標準包裝： | 2,500 |
| 類型： | 限幅放大器 |
| 應(yīng)用： | 光纖學(xué)網(wǎng)絡(luò) |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 20-TQFN-EP（4x4） |
| 包裝： | 帶卷 (TR) |
Pin Description
PIN
NAME
FUNCTION
1
GNDIN+
Input Ground for Shielding Input Signal IN+. Not connected internally.
2
IN+
Noninverting Input Signal
3
IN-
Inverting Input Signal
4
GNDIN-
Input Ground for Shielding Input Signal IN-. Not connected internally.
5, 7, 9, 10
N.C.
No Connection. Leave unconnected.
6, 8, 11
GND
Ground
12, 15
VCC3
Output Circuitry Power Supply
13
OUT-
Inverting Output of Amplifier
14
OUT+
Noninverting Output of Amplifier
16
DISABLE
When DISABLE is connected to VCC or left floating, outputs are disabled. When DISABLE is
connected to GND, outputs are enabled.
17
VCC2
Power Supply to Circuitry other than Input and Output Circuits
18
CZ+
Filter Capacitor for Offset Correction. Connect CZ between pin 18 and pin 19. See the Detailed
Description section.
19
CZ-
Filter Capacitor for Offset Correction. Connect CZ between pin 18 and pin 19. See the Detailed
Description section.
20
VCC1
Input Circuitry Power Supply
—
EP
Exposed Pad. Must be soldered to supply ground for proper electrical and thermal operation.
MAX3971A
+3.3V, 10.7Gbps Limiting Amplifier
_______________________________________________________________________________________
5
Detailed Description and
Applications Information
Figure 1 is a functional diagram of the MAX3971A limit-
ing amplifier. The signal path consists of an input buffer
followed by a gain stage and output amplifier. A feed-
back loop provides offset correction by driving the
average value of the differential output to zero.
Gain Stage and Offset Correction
The limiting amplifier provides approximately 42dB
gain. The large gain makes the amplifier susceptible to
small DC offsets, which cause deterministic jitter. A
low-frequency loop is integrated into the limiting ampli-
fier to reduce output offset, typically to less than 2mV.
The external capacitor (CZ) is required for stability and
to set the low-frequency cutoff for the offset correction
loop. The time constant of the loop is set by the product
of an equivalent 20k
Ω on-chip resistor and the value of
the off-chip capacitor (CZ). For stable operation, the
minimum value of CZ is 0.01F. To minimize pattern-
dependent jitter, CZ should be as large as possible.
For 10Gbps ethernet and SONET applications, the typi-
cal value of CZ is 0.1F. Keep CZ close to the package
to reduce parasitic inductance.
CML Input Circuit
The input buffer is designed to accept CML input sig-
nals such as the output from the MAX3970 transimped-
ance amplifier. An equivalent circuit for the input is
shown in Figure 2. For lowest deterministic jitter in all
operating conditions, AC-coupling capacitors are rec-
ommended on the input.
MAX3971A
CZ-
CZ+
LOWPASS
FILTER
CZ
OFFSET
CORRECTION
AMP
INPUT
AMPLIFIER
GAIN
42dB
OUTPUT
AMPLIFIER
OUT+
OUT-
IN+
GNDIN+
GNDIN-
IN-
DISABLE
100
Ω
Figure 1. Functional Diagram
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| MAX3975EVKIT | 功能描述:交換機 IC 開發(fā)工具 RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:USB Power Switches 工具用于評估:MAX4984E 工作電源電壓:2.8 V to 5.5 V |
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| MAX3975UBA-T | 功能描述:多路器開關(guān) IC RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻（最大值）:7 Ohms 開啟時間（最大值）: 關(guān)閉時間（最大值）: 傳播延遲時間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UQFN-16 |
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| MAX397C/D DIE | 制造商:Maxim Integrated Products 功能描述: |
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