
Precision, Quad, SPST Analog Switches
__________Applications Information
Overvoltage Protection
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maxi-
mum ratings, because stresses beyond the listed rat-
ings may cause permanent damage to the devices.
Always sequence V+ on first, followed by V-, and then
logic inputs. If power-supply sequencing is not possi-
ble, add two small signal diodes in series with supply
pins for overvoltage protection (Figure 1). Adding
diodes reduces the analog signal range to 1V below V+
and 1V below V-, but low switch resistance and low
leakage characteristics are unaffected. Device opera-
tion is unchanged, and the difference between V+ and
V- should not exceed 17V.
______________________________________________________________Pin Description
POSITIVE SUPPLY
COM
NEGATIVE SUPPLY
NO
Vg
V+
V-
Figure 1. Overvoltage Protection Using Two External Blocking
Diodes
PIN
DIP/SO/TSSOP
QFN
NAME
FUNCTION
1, 16, 9, 8
15, 14, 7, 6
IN1–IN4
Inputs
2, 15, 10, 7
16, 13, 8, 5
COM1–COM
Analog Switch Common Terminal
3, 14, 11, 6
1, 12, 9, 4
NO1–NO4
or
NC1–NC4
Switch Inputs
4
2
V-
Negative-Supply Voltage Input
5
3
GND
Ground
12
10
N.C.
No Connection. Not internally connected
13
11
V+
Positive-Supply Voltage Input—connected to substrate
—
EP
Exposed Pad. Connect to V+.
MAX391/MAX392/MAX393
Maxim Integrated
7