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參數(shù)資料
| 型號(hào)： | MAX3878EHJ |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | 2.5Gbps, +3.3V Clock and Data Retiming ICs with Vertical Threshold Adjust |
| 中文描述： | CLOCK RECOVERY CIRCUIT, PQFP32 |
| 封裝： | 5 X 5 MM, 1 MM HEIGHT, EXPOSED PAD, TQFP-32 |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 550K |
| 代理商： | MAX3878EHJ |
M
2.5Gbps, +3.3V Clock and Data Retiming ICs
with Vertical Threshold Adjust
4
_______________________________________________________________________________________
AC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +3.0V to +3.6V, T
A
= -40
°
C to +85
°
C, unless otherwise noted. Typical values are at V
CC
= +3.3V and T
A
= +25
°
C.)
(Note 6)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
f = 70kHz
3.18
f = 100kHz (see
“
Jitter Tolerance
”
graph in
Typical Operating Characteristics
)
2.75
f = 1MHz
0.41
0.67
Jitter Tolerance
f = 10MHz
0.36
0.45
UIp-p
0.003
0.006
UI
RMS
Jitter Generation
J
GEN
Jitter bandwidth = 12kHz to 20MHz
0.026
0.056
UIp-p
Clock Output Edge Speed
(20% to 80%)
120
ps
Data Output Edge Speed
(20% to 80%)
120
ps
Tolerated Consecutive Identical
Digits
BER
≤
10
-10
2000
bits
100kHz to 2.5GHz
17
Input Return Loss (SDI
±
, SLBI
±
)
2.5GHz to 4.0GHz
14.5
dB
PLL Acquisition Time
14
ms
LOS Assert Time
1.65
μs
LOS Deassert Time
4.0
μs
Low-Frequency Cutoff for
DC-Cancellation Loop
C
PWD
= 0.1μF
10
kHz
HOLDOVER SPECIFICATION
VCO Frequency Drift Rate in the
Absence of Data
df/dt
C
FIL
= 1μF
6.2
kHz/μs
PHASE ADJUST SPECIFICATION
Minimum Phase Adjust Range
(Note 7)
-60
+60
ps
Phase Adjust Stability
(Note 8)
-8
+8
ps
Note 1:
At T
A
= -40
°
C, DC characteristics are guaranteed by design and characterization.
Note 2:
Excluding PECL output termination, CML outputs open.
Note 3:
Jitter specifications are guaranteed for this data input voltage range, measured by connecting THADJ to V
CC
. Guaranteed
by design and characterization.
Note 4:
Jitter specifications are guaranteed when input threshold is set to
≤
30% of the differential input swing. Measured with edge
speed
≤
150ps (Figure 3). Guaranteed by design and characterization.
Note 5:
Threshold setting stability is guaranteed by design and characterization.
Note 6:
AC characteristics are guaranteed by design and characterization.
Note 7:
Phase adjust is disabled when PHADJ is connected to V
CC
.
Note 8:
Phase adjust stability is guaranteed over temperature and power-supply variation.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX3878EHJ-T | 功能描述:計(jì)時(shí)器和支持產(chǎn)品 2.5Gbps 3.3V Clock & Data Retiming IC RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時(shí)器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
| MAX3878EVKIT | 功能描述:計(jì)時(shí)器和支持產(chǎn)品 Evaluation Kit for the MAX3877 MAX3878 RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時(shí)器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
| MAX3880ECB | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX3880ECB+ | 制造商:Maxim Integrated Products 功能描述:SDH/SONET1:16 DESERLIZER W/ CLOCK RECOVERY 64TQFP EP - Bulk |
| MAX3880ECB+D | 功能描述:串行器/解串器 - Serdes 3.3V 2.488Gbps SDH/ SONET 1:16 Deserial RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
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