參數(shù)資料
型號: MAX3421EEHJ+
廠商: Maxim Integrated Products
文件頁數(shù): 10/28頁
文件大?。?/td> 0K
描述: IC USB PERIPH/HOST CNTRL 32TQFP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 360
控制器類型: USB 外設控制器
接口: USB/串行
電源電壓: 3 V ~ 3.6 V
電流 - 電源: 15mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-TQFP
供應商設備封裝: 32-TQFP(5x5)
包裝: 管件
產(chǎn)品目錄頁面: 1407 (CN2011-ZH PDF)
配用: MAX3421EVKIT-1+-ND - EVAL KIT FOR MAX3421E
MAX3421E
USB Peripheral/Host Controller
with SPI Interface
18
Maxim Integrated
GPOUT7–GPOUT0
The SPI master controls the GPOUT3–GPOUT0 states
by writing to bit 3 through bit 0 of the IOPINS1 (R20)
register. GPOUT7–GPOUT4 states are controlled by
writing to bit 3 through bit 0 of the IOPINS2 (R21) regis-
ter. GPOUT7–GPOUT0 logic levels are referenced to
the voltage on VL. As shown in Figure 13, reading the
state of a GPOUT7–GPOUT0 bit returns the state of the
internal register bit, not the actual pin state. This is use-
ful for doing read-modify-write operations to an output
pin (such as blinking an LED), since the load on the
output pin does not affect the register logic state.
GPX
GPX is a push-pull output with a 4-way multiplexer that
selects its output signal. The logic level on GPX is refer-
enced to VL. The SPI master writes to the GPXB and
GPXA bits of PINCTL (R17) register to select one of five
internal signals as depicted in Table 5.
OPERATE: This signal goes high when the
MAX3421E is able to operate after a power-up or
RES reset. OPERATE is active when the RES input
is high and the internal power-on-reset (POR) is
not asserted. OPERATE is the default GPX output.
VBUS_DET: VBUS_DET is the VBCOMP comparator
output. This allows the user to directly monitor the
VBUS status.
BUSACT: USB BUS activity signal (active high).
This signal is active whenever there is traffic on
the USB bus. The BUSACT signal is set whenever
a SYNC field is detected. BUSACT goes low during
bus reset or after 32-bit times of J-state.
REGISTER BIT
GPOUT
WRITE
GPOUT
READ
GPOUT
PIN
Figure 13. Behavior of Read and Write Operations on
GPOUT3–GPOUT0
FULL-SPEED
TIME FRAME
1ms
FULL-SPEED
TIME FRAME
1ms
SOF
USB
PACKETS
GPX
SOF
~50%
Figure 14. GPX Output in SOF Mode
SPI
CONTROLLER
SPI
CONTROLLER
MAX3421E
MOSI
MISO
MOSI
MISO
FDUPSPI = 0 (DEFAULT)
FDUPSPI = 1
Figure 15. MAX3421E SPI Data Pins for Full-Duplex (Top) and
Half-Duplex (Bottom) Operation
Table 5. GPX Output State Due to GPXB
and GPXA Bits
GPXB
GPXA
GPX PIN OUTPUT
0
OPERATE (Default State)
0
1
VBUS_DET
1
0
BUSACT/INIRQ*
1
SOF
*
If SEPIRQ = 1.
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