參數(shù)資料
型號: MAX3397EELA+T
廠商: Maxim Integrated Products
文件頁數(shù): 2/13頁
文件大?。?/td> 0K
描述: IC LVL XLTR DUAL 8-UDFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
邏輯功能: 變換器,雙向,3 態(tài),開路漏極
位數(shù): 2
輸入類型: 邏輯
輸出類型: 邏輯
數(shù)據(jù)速率: 16Mbps
通道數(shù): 2
輸出/通道數(shù)目: 1
差分 - 輸入:輸出: 無/無
傳輸延遲(最大): 15ns
電源電壓: 1.65 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-WFDFN
供應(yīng)商設(shè)備封裝: 8-uDFN(2x2)
包裝: 帶卷 (TR)
MAX3397E
Dual Bidirectional Low-Level
Translator in DFN
10
______________________________________________________________________________________
to design equipment that meets Level 4 of IEC 61000-
4-2 without the need for additional ESD-protection com-
ponents.
The major difference between tests done using the
Human Body Model and IEC 61000-4-2 is higher peak
current in IEC 61000-4-2 because series resistance is
lower in the IEC 61000-4-2 model. Hence, the ESD
withstand voltage measured to IEC 61000-4-2 is gener-
ally lower than that measured using the Human Body
Model. Figure 3a shows the IEC 61000-4-2 model, and
Figure 3b shows the current waveform for the ±8kV,
IEC 61000-4-2, Level 4, ESD contact-discharge test.
The Air-Gap test involves approaching the device with a
charged probe. The contact-discharge method connects
the probe to the device before the probe is energized.
Machine Model
The Machine Model for ESD tests all pins using a
200pF storage capacitor and zero discharge resis-
tance. Its objective is to emulate the stress caused by
contact that occurs with handling and assembly during
manufacturing. Of course, all pins require this protec-
tion during manufacturing, not just inputs and outputs.
Therefore, after PCB assembly, the Machine Model is
less relevant to I/O ports.
Applications Information
Power-Supply Decoupling
To reduce ripple and the chance of transmitting incorrect
data, bypass VL and VCC to ground with a 0.1F capaci-
tor (see the Typical Application Circuit). To ensure full
±15kV ESD protection, bypass VCC to ground with a 1F
capacitor. Place all capacitors as close as possible to
the power-supply inputs.
I2C Level Translation
The MAX3397E level-shifts the data present on the I/O
lines between +1.2V and +5.5V, making them ideal for
level translation between a low-voltage ASIC and an
I2C device. A typical application involves interfacing a
low-voltage microprocessor to a 3V or 5V D/A convert-
er, such as the MAX517.
Push-Pull vs. Open-Drain Driving
The MAX3397E can be driven in a push-pull configura-
tion and include internal 10k
Ω resistors that pull up I/O
VL_ and I/O VCC_ to their respective power supplies,
allowing operation of the I/O lines with open-drain
devices. See the Timing Characteristics table for maxi-
mum data rates when using open-drain drivers.
Chip Information
PROCESS: BiCMOS
tr = 0.7ns to 1ns
30ns
60ns
t
100%
90%
10%
I PEAK
I
Figure 3b. IEC 61000-4-2 ESD Generator Current Waveform
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
Cs
150pF
RC 50M
Ω to 100MΩ
RD 330
Ω
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
Figure 3a. IEC 61000-4-2 ESD Test Model
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