參數(shù)資料
型號: MAX3100EPD+
廠商: Maxim Integrated Products
文件頁數(shù): 20/24頁
文件大?。?/td> 0K
描述: IC UART SPI MICROWIRE-COMP 14DIP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 25
特點: 低功率
通道數(shù): 1,UART
FIFO's: 8 字節(jié)
規(guī)程: RS232,RS485
電源電壓: 2.7 V ~ 5.5 V
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶CMOS:
安裝類型: 通孔
封裝/外殼: 14-DIP(0.300",7.62mm)
供應商設(shè)備封裝: 14-PDIP
包裝: 管件
產(chǎn)品目錄頁面: 1404 (CN2011-ZH PDF)
SPI/MICROWIRE-Compatible
UART in QSOP-16
Detailed Description
The MAX3100 universal asynchronous receiver trans-
mitter (UART) interfaces the SPI/MICROWIRE-compati-
ble, synchronous serial data from a microprocessor
(P) to asynchronous, serial-data communication ports
(RS-232, RS-485, IrDA). Figure 2 shows the MAX3100
functional diagram.
The MAX3100 combines a simple UART and a baud-
rate generator with an SPI interface and an interrupt
generator. Configure the UART by writing a 16-bit word
to a write-configuration register, which contains the
baud rate, data-word length, parity enable, and enable
of the 8-word receive first-in/first-out (FIFO). The write
configuration selects between normal UART timing and
IrDA timing, controls shutdown, and contains 4 interrupt
mask bits.
Transmit data by writing a 16-bit word to a write-data
register, where the last 7 or 8 bits are actual data to be
transmitted. Also included is the state of the transmitted
parity bit (if enabled). This register controls the state of
the RTS output pin. Received words generate an inter-
rupt if the receive-bit interrupt is enabled.
Read data from a 16-bit register that holds the oldest
data from the receive FIFO, the received parity data,
and the logic level at the CTS input pin. This register
also contains a bit that is the framing error in normal
operation and a receive-activity indicator in shutdown.
The baud-rate generator determines the rate at which
the transmitter and receiver operate. Bits B0 to B3 in
the write-configuration register determine the baud-rate
divisor (BRD), which divides down the X1 oscillator fre-
quency. The baud clock is 16 times the data rate (baud
rate).
Pin Description
PIN
QSOP
DIP
TQFN-EP
NAME
FUNCTION
1
23
DIN
SPI/MICROWIRE Serial-Data Input. Schmitt-trigger input.
2
DOUT
SPI/MICROWIRE Serial-Data Output. High impedance when CS is high.
3
SCLK
SPI/MICROWIRE Serial-Clock Input. Schmitt-trigger input.
444
CS
Active-Low Chip-Select Input. DOUT goes high impedance when CS is high,
IRQ, TX, and RTS are always active. Schmitt-trigger input.
655
IRQ
Active-Low Interrupt Output. Open-drain interrupt output to microprocessor.
768
SHDN
Hardware-Shutdown Input. When shut down (SHDN = 0), the oscillator turns
off immediately without waiting for the current transmission to end, reducing
supply current to just leakage currents.
8
7
9
GND
Ground
9
8
10
X2
Crystal Connection. Leave X2 unconnected for external clock. See Crystal-
Oscillator Operation—X1, X2 Connection section.
10
9
11
X1
Crystal Connection. X1 also serves as an external clock input. See Crystal-
Oscillator Operation—X1, X2 Connection section.
11
10
15
CTS
General-Purpose Active-Low Input. Read via the CTS register bit; often used
for RS-232 clear-to-send input (Table 1).
13
11
16
RTS
General-Purpose Active-Low Output. Controlled by the CTS register bit. Often
used for RS-232 request-to-send output or RS-485 driver enable.
14
12
17
RX
Asynchronous Serial-Data (receiver) Input. The serial information received
from the modem or RS-232/RS-485 receiver. A transition on RX while in
shutdown generates an interrupt (Table 5).
15
13
21
TX
Asynchronous Serial-Data (transmitter) Output
16
14
22
VCC
Positive Supply Pin (2.7V to 5.5V)
5, 12
1, 6, 7, 12,
13, 14, 18,
19, 20, 24
N.C.
No Connection. Not internally connected.
EP
Exposed Pad. Connect EP to ground or leave unconnected.
MAX3100
Maxim Integrated
5
MAX3100
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