參數(shù)資料
型號: MAX3004EUP+
廠商: Maxim Integrated Products
文件頁數(shù): 3/25頁
文件大?。?/td> 0K
描述: IC XLATR LEVEL BIDIR 8CH 20TSSOP
標(biāo)準(zhǔn)包裝: 74
邏輯功能: 轉(zhuǎn)換器,單向,3態(tài)
位數(shù): 8
輸入類型: CMOS
輸出類型: CMOS
數(shù)據(jù)速率: 35Mbps
通道數(shù): 8
輸出/通道數(shù)目: 1
差分 - 輸入:輸出: 無/無
傳輸延遲(最大): 8.5ns
電源電壓: 1.65 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
封裝/外殼: *
供應(yīng)商設(shè)備封裝: *
包裝: *
+1.2V to +5.5V, ±15kV ESD-Protected, 0.1A,
35Mbps, 8-Channel Level Translators
Pin Description (continued)
PIN
TSSOP
UCSP
TQFN
NAME
FUNCTION
1B1
19
I/O VL1A
Input/Output 1A, Referenced to VL
2A1
20
VL
Logic Input Voltage, +1.2V
≤ VL ≤ VCC. Bypass VL to GND with a 0.1F capacitor.
3A2
1
I/O VL2A
Input/Output 2A, Referenced to VL
4B2
2
I/O VL3A
Input/Output 3A, Referenced to VL
5A3
3
I/O VL4A
Input/Output 4A, Referenced to VL
6B3
4
I/O VL1B
Input/Output 1B, Referenced to VL
7A4
5
I/O VL2B
Input/Output 2B, Referenced to VL
8B4
6
I/O VL3B
Input/Output 3B, Referenced to VL
9A5
7
I/O VL4B
Input/Output 4B, Referenced to VL
10
B5
8
EN A/B
Enable Input. If EN A/B is pulled low, channels 1B through 4B are active, and channels
1A through 4A are in three-state. If EN A/B is driven high to VL, channels 1A through 4A
are active, and channels 1B through 4B are in three-state.
11
C5
9
GND
Ground
12
D5
10
I/O VCC4B
Input/Output 4B, Referenced to VCC
13
C4
11
I/O VCC3B
Input/Output 3B, Referenced to VCC
14
D4
12
I/O VCC2B
Input/Output 2B, Referenced to VCC
15
C3
13
I/O VCC1B
Input/Output 1B, Referenced to VCC
16
D3
14
I/O VCC4A
Input/Output 4A, Referenced to VCC
17
C2
15
I/O VCC3A
Input/Output 3A, Referenced to VCC
18
D2
16
I/O VCC2A
Input/Output 2A, Referenced to VCC
19
D1
17
VCC
VCC Input Voltage, +1.65V
≤ VCC ≤ +5.5V. Bypass VCC to GND with a 0.1F capacitor.
20
C1
18
I/O VCC1A
Input/Output 1A, Referenced to VCC
EP
Exposed Pad. Connect to GND.
MAX3003
MAX3000E/MAX3001E/MAX3002–MAX3012
Maxim Integrated
11
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