參數(shù)資料
型號(hào)： MAX2306
廠商： Maxim Integrated Products, Inc.
英文描述： CDMA IF VGAs and I/Q Demodulators with VCO and Synthesizer
中文描述： CDMA IF VGA及I/Q解調(diào)器，帶有VCO及合成器
文件頁(yè)數(shù)： 10/20頁(yè)
文件大?。?/td> 295K
代理商： MAX2306
M
CDMA IF VGAs and I/Q Demodulators
with VCO and Synthesizer
10
______________________________________________________________________________________
M
B
Table 1. MAX2306 Control Register States
M
S
PINS
X
L
Shutdown pin completely
powers down the chip
0 in shutdown register bit leaves
serial port active
0 in standby register bit turns off
VGA and modulator only
Mode pin overrides VCO_SEL,
DIVSEL, and IN_SEL to high
Floating mode pin returns control
to register
Mode pin overrides VCO_SEL,
DIVSEL, and IN_SEL to low
Floating mode pin returns control
to register
Mode pin overrides VCO_SEL,
DIVSEL, and IN_SEL to low
Floating pins return control to
register
SHUTDOWN
ACTION
RESULT
OPERATIONAL
MODE
T
X
C
T
X
X
T
D
X
V
V
X
X
X
B
B
X
X
F
I
X
S
S
M
S
B
L
S
B
CONTROL REGISTER
X
X
X
X
X
X
H
X
SHUTDOWN
X
X
X
X
X
X
X
0
X
X
X
0
X
H
X
STANDBY
X
X
1
0
0
H
H
CDMA
X
X
X
X
X
1
X
1
0
F
H
CDMA
1
1
X
X
1
1
X
1
0
L
H
FM_IQ
X
X
X
X
X
1
0
1
0
F
H
FM_IQ
X
X
0
1
0
1
0
L
H
FM_I
X
X
X
X
X
1
1
1
0
F
H
L
FM_I
X
X
0
1
1
1
Note:
H = high, L = low, F = floating pin, X = don’t care, Blank = independent parameter, 1 = logic high, 0 = logic low.
The appropriate latch outputs provide I and Q signals
at the desired LO frequency.
Synthesizer
The VCO
’
s output frequency is controlled by an internal
phase-locked-loop (PLL) dual-modulus synthesizer. The
loop filter is off-chip to simplify loop design for emerg-
ing applications. The tunable resonant network is also
off-chip for maximum Q and for system design flexibili-
ty. The VCO output frequency is divided down to the
desired comparison frequency with the M counter. The
M counter consists of a 4-bit A swallow counter and a
10-bit P counter. A reference signal is provided from an
external source and is divided down to the comparison
frequency with the R counter. The two divided signals
are compared with a three-state digital phase-frequen-
cy detector. The phase-detector output drives a
charge-pump as well as lock-detect logic and tur-
bocharge control logic. The charge-pump output
(CP_OUT) pin is processed by the loop filter and drives
the tunable resonant network, altering the VCO frequen-
cy and closing the loop.
Multimode applications are supported by two indepen-
dent programmable registers each for the M counter
(M1, M2), the R counter (R1, R2), and the charge-pump
output current magnitude (CP1, CP2). The DIVSEL (DS)
bit selects which set of registers is used. It can be over-
ridden by the MAX2306
’
s MODE pin or the MAX2309
’
s
DIVSEL pin. Programming these registers is discussed
in the
3-Wire Interface and Registers
section.
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MAX2306EGI 功能描述:調(diào)節(jié)器/解調(diào)器 CDMA If VGAs & I/Q Demodulator w/VCO RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel
MAX2306EGI-T 功能描述:調(diào)節(jié)器/解調(diào)器 CDMA If VGAs & I/Q Demodulator w/VCO RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel
MAX2306ETI+ 功能描述:調(diào)節(jié)器/解調(diào)器 CDMA If VGAs & I/Q Demodulator w/VCO RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel
MAX2306ETI+T 功能描述:調(diào)節(jié)器/解調(diào)器 CDMA If VGAs & I/Q Demodulator w/VCO RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel
MAX2306EVKIT 功能描述:射頻開(kāi)發(fā)工具 MAX2306/8/9 Eval Kit RoHS:否 制造商:Taiyo Yuden 產(chǎn)品:Wireless Modules 類型:Wireless Audio 工具用于評(píng)估:WYSAAVDX7 頻率: 工作電源電壓:3.4 V to 5.5 V
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