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參數(shù)資料
| 型號： | MAX192BMJP |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | Low-Power, 8-Channel, Serial 10-Bit ADC |
| 中文描述： | 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP20 |
| 封裝： | CERDIP-20 |
| 文件頁數(shù)： | 3/24頁 |
| 文件大小： | 201K |
| 代理商： | MAX192BMJP |
M
Low-Power, 8-Channel,
S erial 10-Bit ADC
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 5V ±5%, f
CLK
= 2.0MHz, external clock (50% duty cycle), 15 clocks/conversion cycle (133ksps), 4.7μF capacitor at VREF pin,
T
A
= T
MIN
to T
MAX,
A
= +25°C.)
Internal compensation
External compensation
Internal compensation
External compensation
0mA to 0.5mA output load
T
A
= +25°C (Note 7)
(Note 5)
On/off leakage current; V
IN
= 0V, 5V
Bipolar
Used for data transfer only
Internal compensation (Note 5)
External compensation, 4.7μF
Single-ended range (unipolar only)
Common-mode range (any input)
CONDITIONS
0
mV
2.5
Load Regulation (Note 8)
ppm/°C
±30
VREF Tempco
mA
30
VREF Short-Circuit Current
V
4.066
4.096
4.126
VREF Output Voltage
pF
16
Input Capacitance
INTERNAL REFERENCE
(reference buffer enabled)
μA
±0.01
±1
Multiplexer Leakage Current
V
-V
REF
-2
+V
REF
2
Analog Input Voltage
(Note 6)
0
V
REF
0
V
REF
0
V
DD
MHz
10
External Clock Frequency
0.1
0.4
0.1
2.0
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
Capacitive Bypass at VREF
4.7
0.01
0.01
μF
Capacitive Bypass at REFADJ
μF
REFADJ Adjustment Range
EXTERNAL REFERENCE AT VREF
(buffer disabled, VREF = 4.096V)
±1.5
%
Input Voltage Range
2.5
V
DD
+
50mV
V
Input Current
Input Resistance
Shutdown VREF Input Current
200
20
1.5
350
μA
k
μA
12
10
Buffer Disable Threshold
REFADJ
V
DD
-
50mV
V
Unipolar
Differential range
Internal compensation mode
External compensation mode
0
Capacitive Bypass at VREF
4.7
μF
Reference-Buffer Gain
REFADJ Input Current
1.678
V/V
μA
±50
ANALOG INPUT
EXTERNAL REFERENCE AT REFADJ
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