參數(shù)資料
型號(hào): MAX147AEAP+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 14/24頁(yè)
文件大?。?/td> 0K
描述: IC ADC 12BIT SERIAL 20-SSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,000
位數(shù): 12
采樣率(每秒): 133k
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 640mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 20-SSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個(gè)單端,單極;8 個(gè)單端,雙極;4 個(gè)差分,單極;4 個(gè)差分,雙極
MAX146/MAX147
+2.7V, Low-Power, 8-Channel,
Serial 12-Bit ADCs
______________________________________________________________________________________
21
TMS320LC3x Interface
Figure 21 shows an application circuit to interface the
MAX146/MAX147 to the TMS320 in external clock mode.
The timing diagram for this interface circuit is shown in
Figure 22.
Use the following steps to initiate a conversion in the
MAX146/MAX147 and to read the results:
1) The TMS320 should be configured with CLKX
(transmit clock) as an active-high output clock and
CLKR (TMS320 receive clock) as an active-high
input clock. CLKX and CLKR on the TMS320 are
tied together with the MAX146/MAX147’s SCLK
input.
2) The MAX146/MAX147’s CS pin is driven low by the
TMS320’s XF_ I/O port to enable data to be clocked
into the MAX146/MAX147’s DIN.
3) An 8-bit word (1XXXXX11) should be written to the
MAX146/MAX147 to initiate a conversion and place
the device into external clock mode. Refer to Table
1 to select the proper XXXXX bit values for your
specific application.
4) The MAX146/MAX147’s SSTRB output is monitored
via the TMS320’s FSR input. A falling edge on the
SSTRB output indicates that the conversion is in
progress and data is ready to be received from the
MAX146/MAX147.
5) The TMS320 reads in one data bit on each of the
next 16 rising edges of SCLK. These data bits rep-
resent the 12-bit conversion result followed by four
trailing bits, which should be ignored.
6) Pull CS high to disable the MAX146/MAX147 until
the next conversion is initiated.
011 . . . 111
011 . . . 110
000 . . . 010
000 . . . 001
000 . . . 000
111 . . . 111
111 . . . 110
111 . . . 101
100 . . . 001
100 . . . 000
- FS
COM*
INPUT VOLTAGE (LSB)
OUTPUT CODE
ZS = COM
+FS - 1LSB
*COM
VREF / 2
+ COM
FS =
VREF
2
-FS =
+ COM
-VREF
2
1LSB =
VREF
4096
Figure 18. Bipolar Transfer Function, Full Scale (FS) =
VREF / 2 + COM, Zero Scale (ZS) = COM
+3V
GND
SUPPLIES
DGND
+3V
DGND
COM
AGND
VDD
DIGITAL
CIRCUITRY
MAX146
MAX147
R* = 10
*OPTIONAL
Figure 19. Power-Supply Grounding Connection
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