參數(shù)資料
型號(hào): MAX1446GHJ+
廠商: Maxim Integrated Products
文件頁數(shù): 9/20頁
文件大?。?/td> 0K
描述: IC ADC 10BIT 60MSPS 3V 32-TQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 360
位數(shù): 10
采樣率(每秒): 60M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 32-TQFP
供應(yīng)商設(shè)備封裝: 32-TQFP(5x5)
包裝: 管件
輸入數(shù)目和類型: 2 個(gè)單端,雙極;1 個(gè)差分,雙極
MAX1446
10-Bit, 60Msps, 3.0V, Low-Power
ADC with Internal Reference
______________________________________________________________________________________
17
Grounding, Bypassing,
__________________and Board Layout
The MAX1446 requires high-speed board layout design
techniques. Locate all bypass capacitors as close to
the device as possible, preferably on the same side as
the ADC, using surface-mount devices for minimum
inductance. Bypass VDD, REFP, REFN, and COM with
two parallel 0.1F ceramic capacitors and a 2.2F
bipolar capacitor to GND. Follow the same rules to
bypass the digital supply (OVDD) to OGND. Multilayer
boards with separated ground and power planes pro-
duce the highest level of signal integrity. Consider
using a split ground plane arranged to match the physi-
cal location of the analog ground (GND) and the digital
output driver ground (OGND) on the ADC's package.
The two ground planes should be joined at a single
point so that the noisy digital ground currents do not
interfere with the analog ground plane. The ideal loca-
tion of this connection can be determined experimen-
tally at a point along the gap between the two ground
planes that produces optimum results. Make this con-
nection with a low-value, surface-mount resistor (1
Ω to
5
Ω), a ferrite bead, or a direct short. Alternatively, all
REFOUT
29
N.C.
REFIN
31
REFP
32
REFN
1
COM
2
0.1
μF
0.1
μF
0.1
μF
330
μF
6V
330
μF
6V
330
μF
6V
10
μF
6V
11
4
3
2
3
1
2
1
MAX1446
N = 1
MAX6066
1/4 MAX4252
REFOUT
29
N.C.
REFIN
31
REFP
32
REFN
1
COM
2
0.1
μF
0.1
μF
0.1
μF
MAX1446
N = 32
47
Ω
2.0V AT 8mA
1.47k
Ω
21.5k
Ω
3.3V
1
μF
21.5k
Ω
21.5k
Ω
21.5k
Ω
21.5k
Ω
NOTE: ONE FRONT-END REFERENCE CIRCUIT DESIGN MAY BE USED WITH UP TO 32 ADCs.
2.2
μF
10V
0.1
μF
0.1
μF
3.3V
2.0V
10
μF
6V
11
4
5
6
7
1/4 MAX4252
47
Ω
1.5V AT 0mA
1.47k
Ω
3.3V
10
μF
6V
11
4
10
9
8
1/4 MAX4252
47
Ω
1.0V AT -8mA
1.47k
Ω
3.3V
MAX4254 POWER-SUPPLY BYPASSING.
PLACE CAPACITOR AS CLOSE AS
POSSIBLE TO THE OP AMP.
0.1
μF
1.5V
1.0V
Figure 11. Unbuffered External Reference Drives Up to 32 ADCs
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