參數(shù)資料
型號: MAX1396MUB+T
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: 1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/2-Channel Single-Ended, 12-Bit, SAR ADCs
中文描述: 2-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO10
封裝: MO-187C-BA, MICRO SOP-10
文件頁數(shù): 6/19頁
文件大小: 1037K
代理商: MAX1396MUB+T
MAX1393/MAX1396
Differential Nonlinearity (DNL)
DNL is the difference between an actual step width and
the ideal value of 1 LSB. A DNL error specification of
less than ±1 LSB guarantees no missing codes and a
monotonic transfer function. For the MAX1393/
MAX1396, DNL deviations are measured at every step
and the worst-case deviation is reported in the
Electrical Characteristics section.
Signal-to-Noise Plus Distortion (SINAD)
SINAD is computed by taking the ratio of the RMS sig-
nal to the RMS noise plus the RMS distortion. RMS
noise includes all spectral components to the Nyquist
frequency excluding the fundamental, the first five har-
monics (HD2–HD5), and the DC offset. RMS distortion
includes the first five harmonics (HD2–HD5):
SINAD
SIGNAL
NOISE
DISTORTION
RMS
log
+
20
22
14
______________________________________________________________________________________
1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/
2-Channel Single-Ended, 12-Bit, SAR ADCs
MAX1393
MAX1396
OE
a) TMS320C541 CONNECTION DIAGRAM
I/O
FSX
FSR
CS
DOUT
DR
I/O
UNI/BIP
(CH1/CH2)*
CLKX
CLKR
SCLK
MAX1393
MAX1396
OE
b) ADSP218x CONNECTION DIAGRAM
I/O
TFS
RFS
CS
DOUT
DR
I/O
UNI/BIP
(CH1/CH2)*
SCLK
MAX1393
MAX1396
OE
c) DSP563xx CONNECTION DIAGRAM
*INDICATES THE MAX1396
I/O
SC2
CS
DOUT
I/O
UNI/BIP
(CH1/CH2)*
SLK
SDR
SCLK
Figure 11. Common DSP Connections to the MAX1393/MAX1396
DAYS
VOLTAGE
(V)
1.8
2.0
2.2
2.4
2.6
2.8
3.0
1.6
0
700
600
500
400
300
200
100
TA = +25
°C
Figure 12a. Typical 2xAA Discharge Curve at 100ksps
DAYS
VOLTAGE
(V)
40
30
20
10
1.8
2.0
2.2
2.4
2.6
2.8
3.0
1.6
050
TA = +25
°C
Figure 12b. Typical CR2032 Discharge Curve at 100ksps
相關(guān)PDF資料
PDF描述
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