參數(shù)資料
型號(hào): MAX1283BEUE
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: 300ksps/400ksps, Single-Supply, 4-Channel, Serial 12-Bit ADCs with Internal Reference
中文描述: 4-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO16
封裝: 4.40 MM, 0.65 MM PITCH, MO-153AC, TSSOP-16
文件頁數(shù): 18/24頁
文件大?。?/td> 310K
代理商: MAX1283BEUE
M
300ksps/400ksps, Single-Supply, 4-Channel,
Serial 12-Bit ADCs with Internal Reference
18
______________________________________________________________________________________
Figure 11a. Full Power-Down Timing
RE FADJ
1.22V
1.22V
0V
2.5mA
2.5mA
1.3mA OR 0.9mA
DIN
I
VDD1
+ I
VDD2
REF
FULLPD
REDP
DUMMY CONVERSION
WAIT 2ms (10 x RC)
FULLPD
1
0 0
1
1
γ
= RC = 17k
x 0.01
μ
F
1
1 0
0 0
2.5V
2.5mA
0mA
0mA
2.5V
0V
Figure 11b. FASTPD and REDP Timing
2.5V (ALWAYS ON)
2.5mA
2.5mA
DIN
IV
DD1
+ IV
DD2
REF
REDP
REDP
FASTPD
1
1 0
1
1
1 0
0 1
2.5mA
0.9mA
0.9mA
1.3mA
To use the direct REF input, disable the internal buffer by
connecting REFADJ to V
DD1
. Using the REFADJ input
makes buffering the external reference unnecessary.
Transfer Function
Table 5 shows the full-scale voltage ranges for unipolar
and bipolar modes.
Figure 13 depicts the nominal, unipolar input/output
(I/O) transfer function, and Figure 14 shows the bipolar
I/O transfer function. Code transitions occur halfway
between successive-integer LSB values. Output coding
is binary, with 1LSB = 0.61mV (2.500V / 4096) for unipo-
lar operation, and 1LSB = 0.61mV [(2.500V / 2) / 4096]
for bipolar operation.
Layout, Grounding, and Bypassing
For best performance, use PC boards; wire-wrap
boards are not recommended. Board layout should
ensure that digital and analog signal lines are separated
from each other. Do not run analog and digital (espe-
cially clock) lines parallel to one another, or digital lines
underneath the ADC package.
Figure 15 shows the recommended system ground
connections. Establish a single-point analog ground
(star ground point) at GND. Connect all other analog
grounds to the star ground. Connect the digital system
ground to this ground only at this point. For lowest-
noise operation, the ground return to the star ground’s
power supply should be low impedance and as short
as possible.
High-frequency noise in the V
DD1
power supply may
affect the high-speed comparator in the ADC. Bypass
the supply to the star ground with 0.1μF and 10μF
capacitors close to V
DD1
of the MAX1282/MAX1283.
Minimize capacitor lead lengths for best supply-noise
rejection. If the power supply is very noisy, a 10
resis-
tor can be connected as a lowpass filter (Figure 15).
High-Speed Digital Interfacing with QSPI
The MAX1282/MAX1283 can interface with QSPI using
the circuit in Figure 16 (CPOL = 0, CPHA = 0). This
QSPI circuit can be programmed to do a conversion on
each of the four channels. The result is stored in memory
without taxing the CPU, since QSPI incorporates its own
microsequencer.
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