參數(shù)資料
型號: MAX1280
廠商: Maxim Integrated Products, Inc.
英文描述: 400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference
中文描述: 400ksps/300ksps、單電源、低功耗、8通道、串行12位ADC,內(nèi)置電壓基準
文件頁數(shù): 10/24頁
文件大?。?/td> 363K
代理商: MAX1280
M
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel,
Serial 12-Bit ADCs with Internal Reference
10
______________________________________________________________________________________
Pin Description
Positive Supply Voltage
V
DD2
19
Input to the Reference-Buffer Amplifier. To disable the reference-buffer amplifier, tie REFADJ to V
DD1
.
REFADJ
12
Serial Strobe Output. SSTRB pulses high for one clock period before the MSB decision. High imped-
ance when
CS
is high.
SSTRB
15
Serial Data Input. Data is clocked in at SCLK’s rising edge.
DIN
16
Active-Low Chip Select. Data will not be clocked into DIN unless
CS
is low. When
CS
is high, DOUT
and SSTRB are high impedance.
CS
17
Serial Clock Input. Clocks data in and out of the serial interface and sets the conversion speed. (Duty
cycle must be 40% to 60%.)
SCLK
18
Reference-Buffer Output/ADC Reference Input. Reference voltage for analog-to-digital conversion.
In internal reference mode, the reference buffer provides a +2.500V nominal output, externally
adjustable at REFADJ. In external reference mode, disable the internal buffer by pulling REFADJ to
V
DD1
.
REF
11
Analog and Digital Ground
GND
13
Serial Data Output. Data is clocked out at SCLK’s rising edge. High impedance when
CS
is high.
DOUT
14
Active-Low Shutdown Input. Pulling
SHDN
low shuts down the device, reducing supply current to 2μA
(typ).
SHDN
10
Ground Reference for Analog Inputs. COM sets zero-code voltage in single-ended mode. Must be
stable to ±0.5LSB.
COM
9
PIN
Sampling Analog Inputs
CH0–CH7
1–8
FUNCTION
NAME
V
DD2
6k
GND
DOUT
C
LOAD
20pF
C
LOAD
20pF
GND
6k
DOUT
a)
High-Z to V
OH
and V
OL
to V
OH
b)
High-Z to V
OL
and V
OH
to V
OL
V
DD2
6k
GND
DOUT
C
20pF
C
20pF
GND
6k
DOUT
a)
V
OH
to High-Z
b)
V
OL
to High-Z
Figure 1. Load Circuits for Enable Time
Figure 2. Load Circuits for Disable Time
Positive Supply Voltage
V
DD1
20
相關(guān)PDF資料
PDF描述
MAX1280EVC16 MAX1280 Evaluation System
MAX1280EVKIT MAX1280 Evaluation System
MAX1281 400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference
MAX1280BEUP 400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference
MAX1281BCUP 400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference
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