參數(shù)資料
型號: MAX1277BETC+
廠商: Maxim Integrated Products
文件頁數(shù): 18/18頁
文件大?。?/td> 0K
描述: IC ADC 12BIT 1.5MSPS 12-TQFN
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 75
位數(shù): 12
采樣率(每秒): 1.5M
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 1.35W
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 12-WQFN 裸露焊盤
供應商設備封裝: 12-TQFN-EP(4x4)
包裝: 管件
輸入數(shù)目和類型: 1 個差分,單極
MAX1277/MAX1279
1.5Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
_______________________________________________________________________________________
9
Pin Description
PIN
NAME
FUNCTION
1
AIN-
Negative Analog Input
2
REF
Reference Voltage Output. Internal 2.048V reference output. Bypass REF with a 0.01F capacitor and
a 4.7F capacitor to RGND.
3
RGND
Reference Ground. Connect RGND to GND.
4VDD
Positive Analog Supply Voltage (+2.7V to +3.6V). Bypass VDD with a 0.01F capacitor and a 10F
capacitor to GND.
5, 11
N.C.
No Connection
6
GND
Ground. GND is internally connected to EP.
7VL
Positive Logic Supply Voltage (1.8V to VDD). Bypass VL with a 0.01F capacitor and a 10F capacitor
to GND.
8
DOUT
Serial Data Output. Data is clocked out on the rising edge of SCLK.
9
CNVST
Convert Start. Forcing CNVST high prepares the part for a conversion. Conversion begins on the
falling edge of CNVST. The sampling instant is defined by the falling edge of CNVST.
10
SCLK
Serial Clock Input. Clocks data out of the serial interface. SCLK also sets the conversion speed.
12
AIN+
Positive Analog Input
EP
Exposed Paddle. EP is internally connected to GND.
Detailed Description
The MAX1277/MAX1279 use an input T/H and succes-
sive-approximation register (SAR) circuitry to convert
an analog input signal to a digital 12-bit output. The
serial interface requires only three digital lines (SCLK,
CNVST, and DOUT) and provides easy interfacing to
microprocessors (Ps) and DSPs. Figure 3 shows the
simplified internal structure for the MAX1277/MAX1279.
RGND
AIN +
GND
DOUT
SCLK
CNVST
CONTROL
LOGIC AND
TIMING
AIN -
VL
VDD
REF
12-BIT
SAR
ADC
MAX1277
MAX1279
TRACK AND
HOLD
OUTPUT
BUFFER
REF
2.048V
Figure 3. Functional Diagram
CIN+
RIN+
RIN-
CIN-
VAZ
AIN+
AIN-
CONTROL
LOGIC
CAPACITIVE
DAC
COMP
ACQUISITION MODE
CIN+
RIN+
RIN-
CIN-
VAZ
AIN+
AIN-
CONTROL
LOGIC
CAPACITIVE
DAC
COMP
HOLD/CONVERSION MODE
Figure 4. Equivalent Input Circuit
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MAX1277BETC+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 1.5Msps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構:Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1277BETC+T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 1.5Msps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構:Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1277BETC-T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構:Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1277CTC 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構:Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1277ETC 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構:Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32