參數(shù)資料
型號(hào): MAX1272EUA
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: Fault-Protected, 12-Bit ADCs with Software-Selectable Input Range
中文描述: 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8
封裝: MO-187CAA, USOP-8
文件頁(yè)數(shù): 16/20頁(yè)
文件大?。?/td> 850K
代理商: MAX1272EUA
M
Fault-Protected, 12-Bit ADCs
with Software-Selectable Input Range
16
______________________________________________________________________________________
X = Don
t care.
CONTROL BIT
SYNCHRONOUS SERIAL-PORT STATUS REGISTER (SSPSTAT)
SMP
BIT7
0
SPI Data Input Sample Phase. Input data is sampled at the middle of the data output
time.
CKE
D/A
P
S
R/W
UA
BF
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
1
X
X
X
X
X
X
SPI Clock Edge-Select Bit. Data is transmitted on the rising edge of the serial clock.
Data Address Bit
Stop Bit
Start Bit
Read/Write Bit Information
Update Address
Buffer Full Status Bit
Table 6. Detailed SSPSTAT Register Contents—PIC16/PIC17
X = Don
t care.
CONTROL BIT
BIT7
BIT6
SYNCHRONOUS SERIAL-PORT CONTROL REGISTER (SSPCON)
Write Collision Detection Bit
Receive Overflow Detection Bit
WCOL
SSPOV
X
X
SSPEN
BIT5
1
Synchronous Serial-Port Enable Bit:
0: Disables serial port and configures these pins as I/O port pins.
1: Enables serial port and configures SCK, SDO, and SCI pins as serial port pins.
CKP
SSPM3
SSPM2
SSPM1
SSPM0
BIT4
BIT3
BIT2
BIT1
BIT0
0
0
0
0
1
Clock Polarity Select Bit. CKP = 0 for SPI master mode section.
Synchronous Serial-Port Mode-Select Bit. Sets SPI master mode and selects f
CLK
= f
OSC
/ 16.
Table 5. Detailed SSPCON Register Contents
PIC16/PIC17
1
111
1
110
1
101
1
100
0
011
0
010
0
001
0
000
0
1
2
OUTPUT CODE
INPUT VOLTAGE (LSB)
1 LSB = FS
3
4092
4094
FS
Figure 13a. Unipolar Transfer Function
0
111
0
110
0
101
0
100
0
001
0
000
1
111
1
011
1
010
1
001
1
000
-2048
-2046
OUTPUT CODE
(TWO’S COMPLEMENT)
INPUT VOLTAGE (LSB)
FS
1 LSB = 2
-1
0 +1
+2045 +2047
Figure 13b. Bipolar Transfer Function
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