參數(shù)資料
型號(hào): MAX1257BETM+
廠商: Maxim Integrated Products
文件頁數(shù): 26/43頁
文件大?。?/td> 0K
描述: IC ADC/DAC 12BIT 48-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 43
類型: ADC,DAC
分辨率(位): 12 b
采樣率(每秒): 225k
數(shù)據(jù)接口: 串行
電壓電源: 模擬和數(shù)字
電源電壓: 2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-TQFN-EP(7x7)
包裝: 管件
MAX1220/MAX1257/MAX1258
12-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
32
______________________________________________________________________________________
Table 20. DAC Serial-Interface Configuration
16-BIT SERIAL WORD
MSB
LSB
CONTROL
BITS
DATA BITS
C3 C2 C1 C0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
DESCRIPTION
FUNCTION
0
X
NOP
No operation.
0
1
0
X
0
X
RESET
Reset all internal registers to 000h and
leave output buffers in their present state.
0
1
X
1
X
Pull-High
Preset all internal registers to FFFh and
leave output buffers in their present state.
0
1
0
————
———
——
DAC0
D11–D0 to input register 0,
DAC output unchanged.
0
1
————
———
——
DAC1
D11–D0 to input register 1,
DAC output unchanged.
0
1
0
————
———
——
DAC2
D11–D0 to input register 2,
DAC output unchanged.
0
1
0
1
————
———
——
DAC3
D11–D0 to input register 3,
DAC output unchanged.
0
1
0
————
———
——
DAC4
D11–D0 to input register 4,
DAC output unchanged.
0
1
————
———
——
DAC5
D11–D0 to input register 5,
DAC output unchanged.
1
0
————
———
——
DAC6
D11–D0 to input register 6,
DAC output unchanged.
1
0
1
————
———
——
DAC7
D11–D0 to input register 7,
DAC output unchanged.
1
0
1
0
————
———
——
DAC0–DAC3
D11–D0 to input registers 0–3 and DAC
registers 0–3. DAC outputs updated
(write-through).
1
0
1
————
———
——
DAC4–DAC7
D11–D0 to input registers 4–7 and DAC
registers 4–7. DAC outputs updated
(write-through).
1
0
————
———
——
DAC0–DAC7
D11–D0 to input registers 0–7 and DAC
registers 0–7. DAC outputs updated
(write-through).
1
0
1
————
———
——
DAC0–DAC7
D11–D0 to input registers 0–7.
DAC outputs unchanged.
111
0
DAC7
DAC6
DAC5
DAC4
DAC3
DAC2
DAC1
DAC0
X
DAC0–DAC7
Input registers to DAC registers indicated
by ones, DAC outputs updated,
equivalent to software
LDAC.
(No effect on DACs indicated by zeros.)
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