- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9889 > MAX1248BCPE+ (Maxim Integrated Products)IC ADC 10BIT SERIAL 16-DIP PDF資料下載
參數(shù)資料
| 型號： | MAX1248BCPE+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 24/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT SERIAL 16-DIP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 25 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 133k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 842mW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 16-DIP（0.300"，7.62mm） |
| 供應商設備封裝： | 16-PDIP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 4 個單端，單極；4 個單端，雙極；2 個差分，單極；2 個差分，雙極 |
MAX1248/MAX1249
+2.7V to +5.25V, Low-Power, 4-Channel,
Serial 10-Bit ADCs in QSOP-16
_______________________________________________________________________________________
9
the acquisition time lengthens, and more time must be
allowed between conversions. The acquisition time,
tACQ, is the maximum time the device takes to acquire
the signal, and is also the minimum time needed for the
signal to be acquired. It is calculated by:
tACQ = 7.6 x (RS + RIN) x 16pF
where RIN = 9k, RS = the source impedance of the
input signal, and tACQ is never less than 1.5s. Note
that source impedances below 3k
do not significantly
affect the ADC’s AC performance.
Higher source impedances can be used if a 0.01F
capacitor is connected to the individual analog inputs.
Note that the input capacitor forms an RC filter with the
input source impedance, limiting the ADC’s signal
bandwidth.
Input Bandwidth
The ADC’s input tracking circuitry has a 2.25MHz
small-signal bandwidth, so it is possible to digitize
high-speed transient events and measure periodic sig-
nals with bandwidths exceeding the ADC’s sampling
rate by using undersampling techniques. To avoid
high-frequency signals being aliased into the frequency
band of interest, anti-alias filtering is recommended.
Analog Input Protection
Internal protection diodes, which clamp the analog input
to VDD and AGND, allow the channel input pins to swing
from AGND - 0.3V to VDD + 0.3V without damage.
However, for accurate conversions near full scale, the
inputs must not exceed VDD by more than 50mV or be
lower than AGND by 50mV.
If the analog input exceeds 50mV beyond the sup-
plies, do not forward bias the protection diodes of off
channels over 4mA.
How to Start a Conversion
A conversion is started by clocking a control byte into
DIN. With CS low, each rising edge on SCLK clocks a bit
from DIN into the MAX1248/MAX1249’s internal shift reg-
ister. After CS falls, the first arriving logic “1” bit defines
the control byte’s MSB. Until this first “start” bit arrives,
any number of logic “0” bits can be clocked into DIN with
no effect. Table 1 shows the control-byte format.
The MAX1248/MAX1249 are compatible with SPI/QSPI
and MICROWIRE devices. For SPI, select the correct
clock polarity and sampling edge in the SPI control reg-
isters: set CPOL = 0 and CPHA = 0. MICROWIRE, SPI,
and QSPI all transmit a byte and receive a byte at the
same time. Using the
Typical Operating Circuit, the sim-
Table 1. Control-Byte Format
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(MSB)
(LSB)
START
SEL2
SEL1
SEL0
UNI/BIP
SGL/DIF
PD1
PD0
BIT
NAME
DESCRIPTION
7(MSB)
START
The first logic “1” bit after CS goes low defines the beginning of the control byte.
6
SEL2
These three bits select which of the four channels are used for the conversion (Tables 2 and 3).
5
SEL1
4
SEL0
3
UNI/BIP
1 = unipolar, 0 = bipolar. Selects unipolar or bipolar conversion mode. In unipolar mode, an
analog input signal from 0V to VREF can be converted; in bipolar mode, the signal can range
from -VREF / 2 to +VREF / 2.
2
SGL/DIF
1 = single ended, 0 = differential. Selects single-ended or differential conversions. In single-
ended mode, input signal voltages are referred to COM. In differential mode, the voltage
difference between two channels is measured (Tables 2 and 3).
1
PD1
Selects clock and power-down modes.
0(LSB)
PD0
PD1
PD0
Mode
0
Full power-down
0
1
Fast power-down (MAX1248 only)
1
0
Internal clock mode
1
External clock mode
相關PDF資料 |
PDF描述 |
|---|---|
| IDT72T36125L4-4BB | IC FIFO 524X18 4-4NS 240BGA |
| MS27474E20A1P | CONN RCPT 79POS JAM NUT W/PINS |
| IDT72T72115L6-7BB | IC FIFO 131072X72 6-7NS 324-BGA |
| MS27484T24B61PC | CONN PLUG 61POS STRAIGHT W/PINS |
| IDT72T7295L4-4BBG | IC FIFO 32768X72 4-4NS 324-BGA |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MAX1248BCPE+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 4Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1248BEEE | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1248BEEE+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 4Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1248BEEE+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 4Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1248BEEE-T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
發(fā)布緊急采購，3分鐘左右您將得到回復。