參數(shù)資料
型號: MAX1231BEVKIT#
廠商: Maxim Integrated Products
文件頁數(shù): 17/22頁
文件大小: 0K
描述: KIT EVALUATION FOR 12BIT ADCS
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
ADC 的數(shù)量: 1
位數(shù): 12
采樣率(每秒): 300k
數(shù)據(jù)接口: SPI?
輸入范圍: ±VREF/2
工作溫度: 0°C ~ 70°C
已用 IC / 零件: MAX1231
已供物品:
MAX1227/MAX1229/MAX1231
12-Bit 300ksps ADCs with FIFO,
Temp Sensor, Internal Reference
4
_______________________________________________________________________________________
Note 1: Tested at VDD = +2.7V, unipolar input mode.
Note 2: Offset nulled.
Note 3: Time for reference to power up and settle to within 1 LSB.
Note 4: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 5: The operational input voltage range for each individual input of a differentially configured pair is from GND to VDD. The
operational input voltage difference is from -VREF/2 to +VREF/2.
Note 6: See Figure 3 (Input Equivalent Circuit) and the Typical Operating Curve in the
Sampling Error vs. Source Impedance sec-
tion.
Note 7: Fast automated test, excludes self-heating effects.
Note 8: When CNVST is configured as a digital input, do not apply a voltage between VIL and VIN.
Note 9: Supply current is specified depending on whether an internal or external reference is used for voltage conversions.
Temperature measurements always use the internal reference.
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V, fSAMPLE = 300kHz, fSCLK = 4.8MHz (50% duty cycle), VREF = 2.5V, TA = TMIN to TMAX, unless otherwise
noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS (SCLK, DIN,
CS, CNVST) (Note 8)
Input Voltage Low
VIL
VDD x 0.3
V
Input Voltage High
VIH
VDD x 0.7
V
Input Hysteresis
VHYST
200
mV
Input Leakage Current
IIN
VIN = 0 or VDD
±0.01
±1.0
A
Input Capacitance
CIN
15
pF
DIGITAL OUTPUTS (DOUT,
EOC)
ISINK = 2mA
0.4
Output Voltage Low
VOL
ISINK = 4mA
0.8
V
Output Voltage High
VOH
ISOURCE = 1.5mA
VDD - 0.5
V
Tri-State Leakage Current
IL
CS = VDD
±0.05
±1
A
Tri-State Output Capacitance
COUT
CS = VDD
15
pF
POWER REQUIREMENTS
Supply Voltage
VDD
2.7
3.6
V
During temp sense
2400
2700
fSAMPLE = 300ksps
1750
2000
fSAMPLE = 0, REFon
1000
1200
Internal
reference
Shutdown
0.2
5
During temp sense
1550
2000
fSAMPLE = 300ksps
1050
1200
Supply Current (Note 9)
IDD
External
reference
Shutdown
0.2
5
A
Power-Supply Rejection
PSR
VDD = 2.7V to 3.6V; full-scale input
±0.2
±1
mV
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