參數(shù)資料
型號: MAX1203BEPP
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: 5v, 8-cHANNEL, sERIAL, 12-bIT adcS WITH 3v dIGITAL iNTERFACE
中文描述: 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP20
封裝: PLASTIC, DIP-20
文件頁數(shù): 12/24頁
文件大?。?/td> 309K
代理商: MAX1203BEPP
M
5V, 8-Channel, S erial, 12-Bit ADCs
with 3V Digital Interfac e
12
______________________________________________________________________________________
Table 2. Control-Byte Format
Table 3. Channel Selection in Single-Ended Mode (SGL/
DIF
= 1)
SEL1
SEL0
0
1
0
1
0
1
0
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
CH4
CH5
SEL2
CH6
CH7
GND
+
+
CH0
+
+
CH1
+
CH3
+
CH2
+
+
Table 4. Channel Selection in Differential Mode (SGL/
DIF
= 0)
SEL1
SEL0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
CH4
CH5
SEL2
CH6
CH7
+
+
CH0
+
+
CH1
+
CH3
+
CH2
+
+
PD0
Bit 0
(LSB)
SGL/
DIF
Bit 2
PD1
Bit 1
UNI/
BIP
Bit 3
SEL 0
Bit 4
Bit 7
(MSB)
SEL 1
SEL 2
START
Bit 5
Bit 6
1
= unipolar,
0
= bipolar. Selects unipolar or bipolar conversion mode. In unipolar mode, an
analog input signal from 0V to V
REF
can be converted; in bipolar mode, the signal can range
from -V
REF
/ 2 to +V
REF
/ 2.
1
= single ended,
0
= differential. Selects single-ended or differential conversions. In single-
ended mode, input signal voltages are referred to GND. In differential mode, the voltage dif-
ference between two channels is measured. (Tables 3 and 4.)
Selects clock and power-down modes.
PD1
PD0
0
0
0
1
1
0
1
1
Mode
Full power-down (I
DD
= 2μA, internal reference)
Fast power-down (I
DD
= 30μA, internal reference)
Internal clock mode
External clock mode
These three bits select which of the eight channels is used for the conversion
(Tables 3 and 4).
The first logic
1
bit after
CS
goes low defines the beginning of the control byte.
UNI/
BIP
3
SGL/
DIF
2
PD1
PD0
1
0 (LSB)
SEL2
SEL1
SEL0
6
5
4
START
7 (MSB)
Description
Name
Bit
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