參數(shù)資料
型號： MAX1198ECM
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： ADC
英文描述： Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs
中文描述： 2-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PQFP48
封裝： 7 X 7 MM, 1 MM HEIGHT, MO-136AE, TQFP-48
文件頁數(shù)： 5/22頁
文件大?。?/td> 557K
代理商： MAX1198ECM
M
Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs
_______________________________________________________________________________________
5
PARAMETER
SYMBOL
CONDITIONS
MIN
T YP
MAX
UNITS
CLK
0.2
×
V
DD
Input Low Threshold
V
IL
PD,
OE
, SLEEP, T/B
0.2
×
OV
DD
V
Input Hysteresis
V
HYST
I
IH
I
IL
C
IN
0.15
V
V
IH
= V
DD
= OV
DD
V
IL
= 0
±
20
±
20
Input Leakage
μA
Input Capacitance
DIGITAL OUTPUTS
( D7A
–
D0A, D7B
–
D0B)
Output Voltage Low
5
pF
V
OL
I
SINK
= -200μA
0.2
V
Output Voltage High
V
OH
I
SOURCE
= 200μA
OV
DD
-
0.2
V
Three-State Leakage Current
Three-State Output Capacitance
POWER REQUIREMENTS
Analog Supply Voltage Range
Output Supply Voltage Range
I
LEAK
C
OUT
OE
= OV
DD
OE
= OV
DD
±
10
μA
pF
5
V
DD
OV
DD
2.7
1.7
3.3
2.5
3.6
3.6
V
V
C
L
= 15pF
Operating, f
INA & B
= 20MHz at -1dB FS
applied to both channels
80
95
Sleep mode
Shutdown, clock idle, PD =
OE
= OV
DD
Operating, f
INA & B
= 20MHz at -1dB FS
applied to both channels (Note 6)
3.2
0.15
mA
Analog Supply Current
I
VDD
20
μA
11.5
mA
Sleep mode
Shutdown, clock idle, PD =
OE
= OV
DD
Operating, f
INA & B
= 20MHz at -1dB FS
applied to both channels
2
2
Output Supply Current
I
OVDD
10
μA
264
314
Sleep mode
Shutdown, clock idle, PD =
OE
= OV
DD
Offset, V
DD
±
5%
Gain, V
DD
±
5%
10.6
0.5
±
3
±
3
mW
Analog Power Dissipation
PDISS
66
μW
Power-Supply Rejection
PSRR
mV/V
TIMING CHARACTERISTICS
CLK Rise to Output Data Valid
Time
t
DO
C
L
= 20pF (Notes 1, 7)
6
8.25
ns
OE
Fall to Output Enable Time
OE
Rise to Output Disable Time
CLK Pulse Width High
CLK Pulse Width Low
t
ENABLE
t
DISABLE
t
CH
t
CL
5
5
ns
ns
ns
ns
Clock period: 10ns (Note 7)
Clock period: 10ns (Note 7)
5 ± 0.5
5 ± 0.5
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 2.5V, 0.1μF and 2.2μF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10k
resistor, V
IN
= 2V
P-P
(differential with respect to COM), C
L
= 10pF at digital outputs, f
CLK
= 100MHz, T
A
= T
MIN
to T
MAX
, unless
otherwise noted.
≥
+25
°
C guaranteed by production test, <+25
°
C guaranteed by design and characterization. Typical values are at
T
A
= +25
°
C.)
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