Low-Power, 1-/2-Channel, I2C, 12-Bit ADCs in Ultra-Tiny 1.9mm " />
參數(shù)資料
型號(hào): MAX11645EUA+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 6/22頁(yè)
文件大?。?/td> 0K
描述: IC ADC 12BIT I2C/SRL 1CH 8UMAX
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 50
位數(shù): 12
采樣率(每秒): 94.4k
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 362mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-uMAX
包裝: 管件
輸入數(shù)目和類型: 2 個(gè)單端,單極;2 個(gè)單端,雙極;1 個(gè)差分,單極;1 個(gè)差分,雙極
MAX11644/MAX11645
Low-Power, 1-/2-Channel, I2C, 12-Bit ADCs
in Ultra-Tiny 1.9mm x 2.2mm Package
14
______________________________________________________________________________________
Configuration/Setup Bytes (Write Cycle)
A write cycle begins with the bus master issuing a
START condition followed by seven address bits
(Figure 7) and a write bit (R/W = 0). If the address byte
is successfully received, the MAX11644/MAX11645
(slave) issues an acknowledge. The master then writes
to the slave. The slave recognizes the received byte as
the set-up byte (Table 1) if the most significant bit
(MSB) is 1. If the MSB is 0, the slave recognizes that
byte as the configuration byte (Table 2). The master
can write either one or two bytes to the slave in any
order (setup byte, then configuration byte; configura-
tion byte, then setup byte; setup byte or configuration
byte only; Figure 9). If the slave receives a byte suc-
cessfully, it issues an acknowledge. The master ends
the write cycle by issuing a STOP condition or a repeat-
ed START condition. When operating in HS mode, a
STOP condition returns the bus into F/S mode (see the
HS Mode section).
B) TWO-BYTE WRITE CYCLE
SLAVE TO MASTER
MASTER TO SLAVE
S
1
SLAVE ADDRESS
A
71 1
W
SETUP OR
CONFIGURATION BYTE
SETUP OR
CONFIGURATION BYTE
8
P OR Sr
1
A
1
MSB DETERMINES WHETHER
SETUP OR CONFIGURATION BYTE
S
1
SLAVE ADDRESS
A
71 1
W
SETUP OR
CONFIGURATION BYTE
8
P OR Sr
1
A
1
MSB DETERMINES WHETHER
SETUP OR CONFIGURATION BYTE
A
1
8
A) ONE-BYTE WRITE CYCLE
NUMBER OF BITS
Figure 9. Write Cycle
BIT 7
(MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(LSB)
REG
SEL2
SEL1
SEL0
CLK
BIP/UNI
RST
X
BIT
NAME
DESCRIPTION
7
REG
Register bit. 1 = setup byte, 0 = configuration byte (Table 2).
6
SEL2
5
SEL1
4
SEL0
Three bits select the reference voltage (Table 6).
Default to 000 at power-up.
3
CLK
1 = external clock, 0 = internal clock. Defaults to 0 at power-up.
2
BIP/UNI
1 = bipolar, 0 = unipolar. Defaults to 0 at power-up (see the Unipolar/Bipolar section).
1
RST
1 = no action, 0 = resets the configuration register to default. Setup register remains unchanged.
0
X
Don’t-care bit. This bit can be set to 1 or 0.
Table 1. Setup Byte Format
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參數(shù)描述
MAX11645EUA+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 2Ch 94.4ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX11645EUA+T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 2Ch 94.4ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX11645EWC+ 制造商:Maxim Integrated Products 功能描述:
MAX11645EWC+T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 2Ch 94.4ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX11646 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:2.7V to 3.6V and 4.5V to 5.5V, Low-Power, 1-/2-Channel, 2-Wire Serial, 10-Bit ADCs