參數(shù)資料
型號: MAX11620EEE+T
廠商: Maxim Integrated Products
文件頁數(shù): 12/21頁
文件大?。?/td> 0K
描述: IC ADC 10BIT 4CH 16QSOP
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
位數(shù): 10
采樣率(每秒): 300k
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉換器數(shù)目: 1
功率耗散(最大): 667mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應商設備封裝: 16-QSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個單端,單極
MAX11618–MAX11621/MAX11624/MAX11625
10-Bit, 300ksps ADCs
with FIFO and Internal Reference
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD = 2.7V to 3.6V (MAX11619/MAX11621/MAX11625); VDD = 4.75V to 5.25V (MAX11618/MAX11620/MAX11624),
fSAMPLE = 300kHz, fSCLK = 4.8MHz (external clock, 50% duty cycle), VREF = 2.5V (MAX11619//MAX11621/MAX11625); VREF = 4.096V
(MAX11618/MAX11620/MAX11624), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDD to GND ..............................................................-0.3V to +6V
CS, SCLK, DIN, EOC, DOUT to GND.........-0.3V to (VDD + 0.3V)
AIN0–AIN14, CNVST/AIN_,
REF to GND ...........................................-0.3V to (VDD + 0.3V)
Maximum Current into Any Pin............................................50mA
Continuous Power Dissipation (TA = +70°C)
16-Pin QSOP (derate 8.3mW/°C above +70°C)...........667mW
24-Pin QSOP (derate 9.5mW/°C above +70°C)...........762mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-60°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC ACCURACY (Note 3)
Resolution
RES
10
Bits
Integral Nonlinearity
INL
±1.0
LSB
Differential Nonlinearity
DNL
No missing codes over temperature
±1.0
LSB
Offset Error
±0.5
±2.0
LSB
Gain Error
(Note 4)
±0.5
±2.0
LSB
Offset Error Temperature
Coefficient
±2
ppm/°C
FSR
Gain Temperature Coefficient
±0.8
ppm/°C
Channel-to-Channel Offset
Matching
±0.1
LSB
DYNAMIC SPECIFICATIONS (30kHz sine-wave input, 300ksps, fSCLK = 4.8MHz)
Signal-to-Noise Plus Distortion
SINAD
62
dB
Total Harmonic Distortion
THD
Up to the 5th harmonic
-79
dBc
Spurious-Free Dynamic Range
SFDR
-81
dBc
Intermodulation Distortion
IMD
fIN1 = 29.9kHz, fIN2 = 30.1kHz
-74
dBc
Full-Power Bandwidth
-3dB point
1
MHz
Full-Linear Bandwidth
S/(N + D) > 61dB
100
kHz
Note 1: Package thermal resistances were obtained usiˇng the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
16 QSOP
Junction-to-Ambient Thermal Resistance (
θJA)...............105°C/W
Junction-to-Case Thermal Resistance (
θJC)......................37°C/W
24 QSOP
Junction-to-Ambient Thermal Resistance (
θJA)................88°C/W
Junction-to-Case Thermal Resistance (
θJC).......................34°C/W
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