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參數(shù)資料
| 型號： | MAX11617EEE+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 8/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC SERIAL 12BIT 12CH 16-QSOP |
| 產(chǎn)品培訓(xùn)模塊： | MAX116xx Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 94.4k |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 666.7mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-QSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 12 個單端，單極；12 個單端，雙極；6 個差分，單極；6 個差分，雙極 |
| 產(chǎn)品目錄頁面： | 1398 (CN2011-ZH PDF) |
MAX11612–MAX11617
Low-Power, 4-/8-/12-Channel, I2C,
12-Bit ADCs in Ultra-Small Packages
16
Maxim Integrated
Data Byte (Read Cycle)
A read cycle must be initiated to obtain conversion
results. Read cycles begin with the bus master issuing
a START condition followed by seven address bits and
a read bit (R/W = 1). If the address byte is successfully
received, the MAX11612–MAX11617 (slave) issues an
acknowledge. The master then reads from the slave.
The result is transmitted in two bytes; first four bits of
the first byte are high, then MSB through LSB are con-
secutively clocked out. After the master has received
the byte(s), it can issue an acknowledge if it wants to
continue reading or a not-acknowledge if it no longer
wishes to read. If the MAX11612–MAX11617 receive a
not-acknowledge, they release SDA, allowing the master
to generate a STOP or a repeated START condition. See
the
Clock Modes and Scan Mode sections for detailed
information on how data is obtained and converted.
Clock Modes
The clock mode determines the conversion clock and
the data acquisition and conversion time. The clock
mode also affects the scan mode. The state of the set-
up byte’s CLK bit determines the clock mode (Table 1).
At power-up, the MAX11612–MAX11617 are defaulted
to internal clock mode (CLK = 0).
Internal Clock
When configured for internal clock mode (CLK = 0), the
MAX11612–MAX11617 use their internal oscillator as the
conversion clock. In internal clock mode, the MAX11612–
MAX11617 begin tracking the analog input after a valid
address on the eighth rising edge of the clock. On the
falling edge of the ninth clock, the analog signal is acquired
and the conversion begins. While converting the analog
input signal, the MAX11612–MAX11617 holds SCL low
(clock stretching). After the conversion completes, the
results are stored in internal memory. If the scan mode is set
for multiple conversions, they all happen in succession with
each additional result stored in memory. The MAX11612/
MAX11613 contain four 12-bit blocks of memory, the
MAX11614/MAX11615 contain eight 12-bit blocks of memo-
ry, and the MAX11616/MAX11617 contain twelve 12-bit
blocks of memory. Once all conversions are complete, the
MAX11612–MAX11617 release SCL, allowing it to be pulled
high. The master can now clock the results out of the mem-
ory in the same order the scan conversion has been done
at a clock rate of up to 1.7MHz. SCL is stretched for a maxi-
mum of 8.3s per channel (see Figure 10).
The device memory contains all of the conversion
results when the MAX11612–MAX11617 release SCL.
CS3
1
CS2
1
CS1
CS0
AIN0
AIN1
AIN2
AIN3
2
AIN4
AIN5
AIN6
AIN7
AIN8
AIN9
AIN10 AIN11
2
0000
+
-
0001
-
+
0010
+
-
0011
-
+
0100
+
-
0101
-
+
0110
+
-
0111
-
+
1000
+-
1001
-+
1010
+-
1011
-+
1100
RESERVED
1101
RESERVED
1110
RESERVED
1111
RESERVED
1For the MAX11612/MAX11613, CS3 and CS2 are internally set to 0. For the MAX11614/MAX11615, CS3 is internally set to 0.
2When SEL1 = 1, a differential read between AIN2 and AIN3/REF (MAX11612/MAX11613) or AIN10 and AIN11/REF
(MAX11616/MAX11617) returns the difference between GND and AIN2 or AIN10, respectively. For example, a differential read of 1011
returns the negative difference between AIN10 and GND. This does not apply to the MAX11614/MAX11615 as each provides separate
pins for AIN7 and REF. In differential scanning, the address increments by 2 until the limit set by CS3–CS1 has been reached.
Table 4. Channel Selection in Differential Mode (SGL/
DIF = 0)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX11617EEE+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 12Ch 94.4ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX11617EEE+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 12Ch 94.4ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX11617EVKIT+ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 MAX11617 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX11617EVSYS+ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 MAX11617 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX11617EWE+ | 制造商:Maxim Integrated Products 功能描述:2.7V TO 3.6V, LOW-POWER, 12-CHANNEL, 2-WIRE SERIAL 12-BIT AD - Rail/Tube |
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