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參數(shù)資料
| 型號： | MAX1145BCAP+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 3/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT 150KSPS 20-SSOP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 66 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 150k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 26.4mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 20-SSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個單端，單極；1 個單端，雙極 |
MAX1144/MAX1145
14-Bit ADCs, 150ksps, 3.3V Single Supply
______________________________________________________________________________________
11
SCLK
DOUT
DIN
SSTRB
CS
4
18
START
M1
M0
P2
P1
P0
9
21
24
B2
B12
B13
MSB
B1
XX
B0
LSB
FILLED WITH
ZEROS
tACQ
tCONV
UNI/
BIP
INT/
EXT
Figure 5. Internal Clock Mode Timing, Short Acquisition, Bipolar Mode
In long acquisition mode, SSTRB pulses high for one
clock period after the 15th falling edge of SCLK follow-
ing the start bit. The MSB of the conversion is available
at DOUT on the 16th falling edge of SCLK (Figure 3).
In external clock mode, SSTRB is high impedance
when CS is high (Figure 4). In external clock mode, CS
is normally held low during the entire conversion. If CS
goes high during the conversion SCLK is ignored until
CS goes low. This allows external clock mode to be
used with 8-bit bytes.
Internal Clock
In internal clock mode, the MAX1144/MAX1145 generate
their own conversion clock. This frees the microprocessor
from the burden of running the SAR conversion clock,
and allows the conversion results to be read back at the
processor’s convenience, at any clock rate up to 4MHz.
SSTRB goes low at the start of the conversion and goes
high when the conversion is complete. SSTRB will be
low for a maximum of 7s, during which time SCLK
should remain low for best noise performance. An inter-
nal register stores data when the conversion is in
progress. SCLK clocks the data out of the internal stor-
age register at any time after the conversion is complete.
The MSB of the conversion is available at DOUT when
SSTRB goes high. The subsequent 13 falling edges on
SCLK shift the remaining bits out of the internal storage
register (Figure 5). CS does not need to be held low
once a conversion is started.
P0 CLOCKED IN
tSSTRB
tCONV
tSCK
tCSS
SSTRB
SCLK
NOTE: FOR BEST NOISE PERFORMANCE, KEEP SCLK LOW DURING CONVERSION.
tCSH
CS
Figure 6. Internal Clock Mode SSTRB Detailed Timing
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX1145BCAP+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14-Bit 150ksps 2.2V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1145BCAP+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14-Bit 150ksps 2.2V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1145BCAP-T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1145BEAP | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1145BEAP+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14-Bit 150ksps 2.2V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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