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參數(shù)資料
| 型號(hào)： | MAX113CAG+ |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 11/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 8BIT 400KSPS 24-SSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 58 |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 400k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 3 |
| 功率耗散（最大）： | 640mW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 4 個(gè)單端，單極；4 個(gè)單端，雙極 |
MAX113/MAX117
Read Mode (MODE = 0)
In read mode, conversions and data access are con-
trolled by the
RD input (Figure 3). The comparator
inputs track the analog input voltage for the duration of
tACQ. A conversion is initiated by driving CS and RD
low. With Ps that can be forced into a wait state, hold
RD low until output data appears. The P starts the
conversion, waits, and then reads data with a single
read instruction.
In read mode,
WR/RDY is configured as a status output
(RDY), so it can drive the ready or wait input of a P.
RDY is an open-collector output (no internal pull-up)
that goes low after the falling edge of
CS and goes high
at the end of the conversion. If not used, the
WR/RDY
pin can be left unconnected. The
INT output goes low
at the end of the conversion and returns high on the ris-
ing edge of
CS or RD.
Write-Read Mode (MODE = 1)
Figures 4 and 5 show the operating sequence for write-
read mode. The comparator inputs track the analog
input voltage for the duration of tACQ. The conversion is
initiated by a falling edge of
WR. When WR returns
high, the result of the four-MSBs flash is latched into the
output buffers and the conversion of the four-LSBs flash
starts.
INT goes low, indicating conversion end, and the
lower four data bits are latched into the output buffers.
The data is then accessible after
RD goes low (see
Timing Characteristics).
A minimum acquisition time (tACQ) is required from INT
going low to the start of another conversion (
WR going
low).
Options for reading data from the converter include
using internal delay, reading before delay, and pipelined
operation (discussed in the following sections).
Using Internal Delay
The P waits for the
INT output to go low before reading
the data (Figure 4).
INT goes low after the rising edge of
WR, indicating that the conversion is complete and the
result is available in the output latch. With
CS low, data
outputs D0–D7 can be accessed by pulling
RD low. INT
is then reset by the rising edge of
CS or RD.
Fastest Conversion:
Reading Before Delay
An external method of controlling the conversion time is
shown in Figure 5. The internally generated delay
(tINTL) varies slightly with temperature and supply volt-
age, and can be overridden with
RD to achieve the
fastest conversion time.
RD is brought low after the ris-
ing edge of
WR, but before INT goes low. This com-
pletes the conversion and enables the output buffers
+3V, 400ksps, 4/8-Channel,
8-Bit ADCs with 1A Power-Down
8
_______________________________________________________________________________________
tCSS
tRDY
tACQ
tAH
WITH EXTERNAL
PULL-UP
tCSH
tACQ
tINTH
tUP
tDH
tCRD
tACCO
D0–D7
RDY
RD
CS
PWRDN
INT
A0–A2
VALID DATA
(N)
ADDRESS VALID (N + 1)
ADDRESS VALID
(N)
tAH
tACQ
tDH
tREAD2
tRD
D0–D7
RD
WR
CS
INT
VALID DATA
(N)
tINTL
tACC2
tWR
tCSS
tCSH
tACQ
tCSS
tCSH
A0–A2
tINTH
ADDRESS
VALID (N)
ADDRESS VALID (N + 1)
Figure 3. Read Mode Timing (Mode = 0)
Figure 4. Write-Read Mode Timing (tRD > tINTL) (Mode = 1)
tCSS
tACQ
tDH
tREAD1
tRD
tINTL
tACQ
tAH
RD
WR
CS
INT
VALID DATA
(N)
tCSS
tCSH
tINTH
tWR
tCSH
tACC1
tCWR
tRI
A0–A2
D0–D7
ADDRESS
VALID (N)
ADDRESS VALID (N + 1)
Figure 5. Write-Read Mode Timing (tRD < tINTL) (Mode = 1)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX113CAG+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8-Bit 4Ch 400ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX113CAG+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8-Bit 4Ch 400ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX113CAG-T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX113CNG | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX113CNG+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8-Bit 4Ch 400ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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