參數(shù)資料
型號(hào): MAX1108EUB+TG07
廠商: Maxim Integrated Products
文件頁數(shù): 15/20頁
文件大小: 0K
描述: IC ADC 8BIT SPI/SRL 50K 10UMAX
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 8
采樣率(每秒): 50k
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 444mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-µMAX
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個(gè)單端,單極;2 個(gè)單端,雙極;1 個(gè)偽差分,單極;1 個(gè)偽差分,雙極
Wake-Up Time
MAX1108/MAX1109
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
4
_______________________________________________________________________________________
CS = VDD
pF
15
COUT
Three-State Output Capacitance
A
±0.01
±10
IL
Three-State Leakage Current
Figure 1, CLOAD = 100pF
Figure 2, CLOAD = 100pF
ns
240
tDV
CS Fall to Output Enable
ns
CONDITIONS
20
200
tDO
SCLK Fall to Output Data Valid
ns
240
tTR
CS Rise to Output Disable
ns
100
tDS
DIN to SCLK Setup Time
s
1.0
tACQ
Acquisition Time
ns
0
tDH
DIN to SCLK Hold Time
External reference
Internal reference (Note 11)
s
20
ns
200
tCL
SCLK Pulse Width Low
ms
12
tWAKE
Wake-Up Time
ns
0
tCSH
CS to SCLK Rise Hold
ns
100
tCSS
CS to SCLK Rise Setup
ns
200
tCH
SCLK Pulse Width High
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
ISINK = 5mA
ISOURCE = 0.5mA
ISINK = 16mA
V
0.4
V
VDD - 0.5
VOH
Output High Voltage
V
0.8
VOL
Output Low Voltage
ELECTRICAL CHARACTERISTICS—MAX1108 (continued)
(VDD = +2.7V to +3.6V; unipolar input mode; COM = GND, fSCLK = 500kHz, external clock mode (50% duty cycle); 10 clocks/conver-
sion cycle (50ksps); 1F capacitor at REF, external +2.048V reference at REF; TA = TMIN to TMAX; unless otherwise noted. Typical
values are at TA = +25°C.)
ELECTRICAL CHARACTERISTICS—MAX1109
(VDD = +4.5V to +5.5V; unipolar input mode; COM = GND, fSCLK = 500kHz, external clock (50% duty cycle); 10 clocks/conversion
cycle (50ksps); 1F capacitor at REF, external +4.096V reference at REF; TA = TMIN to TMAX; unless otherwise noted. Typical values
are at TA = +25°C.)
VDD = 4.5V to 5.5V
LSB
Offset Error
±0.2
±1
LSB
±1
VDD = 4.5V to 5.5V
No missing codes over temperature
Gain Error (Note 3)
ppm/°C
±0.8
CONDITIONS
Gain Temperature Coefficient
TA = TMIN to TMAX
TA = +25°C
mV
50
VDD / 2 Sampling Accuracy
LSB
±0.5
TUE
Total Unadjusted Error
±1
LSB
±0.1
Channel-to-Channel
Offset Matching
±0.15
±0.5
bits
8
Resolution
LSB
INL
Relative Accuracy (Note 1)
LSB
±1
DNL
Differential Nonlinearity
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
DIGITAL OUTPUT (DOUT)
TIMING CHARACTERISTICS (Figures 8, 9, and 10)
DC ACCURACY
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