參數(shù)資料
型號(hào): MAX1081ACUP+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 5/24頁(yè)
文件大?。?/td> 0K
描述: IC ADC 10BIT 300KSPS 20-TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 10
采樣率(每秒): 300k
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 8.0mW
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個(gè)單端,單極;8 個(gè)單端,雙極;4 個(gè)差分,單極;4 個(gè)差分,雙極
Quick Look
To quickly evaluate the MAX1080/MAX1081s’ analog per-
formance, use the circuit of Figure 5. The devices require
a control byte to be written to DIN before each conver-
sion. Connecting DIN to VDD2 feeds in control bytes of
$FF (HEX), which trigger single-ended unipolar conver-
sions on CH7 without powering down between conver-
sions. The SSTRB output pulses high for one clock
period before the MSB of the conversion result is shift-
ed out of DOUT. Varying the analog input to CH7 will
alter the sequence of bits from DOUT. A total of 16
clock cycles is required per conversion. All transitions
of the SSTRB and DOUT outputs typically occur 20ns
after the rising edge of SCLK.
Starting a Conversion
Start a conversion by clocking a control byte into DIN.
With CS low, each rising edge on SCLK clocks a bit from
DIN into the MAX1080/MAX1081s’ internal shift register.
After CS falls, the first arriving logic “1” bit defines the
control byte’s MSB. Until this first “start” bit arrives, any
number of logic “0” bits can be clocked into DIN with no
effect. Table 3 shows the control-byte format.
The MAX1080/MAX1081 are compatible with SPI/
QSPI and MICROWIRE devices. For SPI, select the cor-
rect clock polarity and sampling edge in the SPI control
registers: set CPOL = 0 and CPHA = 0. MICROWIRE,
SPI, and QSPI all transmit a byte and receive a byte at
the same time. Using the Typical Operating Circuit, the
simplest software interface requires only three 8-bit
transfers to perform a conversion (one 8-bit transfer to
configure the ADC, and two more 8-bit transfers to clock
out the conversion result). See Figure 17 for MAX1080/
MAX1081 QSPI connections.
Simple Software Interface
Make sure the CPU’s serial interface runs in master
mode so the CPU generates the serial clock. Choose a
clock frequency from 500kHz to 6.4MHz (MAX1080) or
4.8MHz (MAX1081):
1) Set up the control byte and call it TB1. TB1 should
be of the format: 1XXXXXXX binary, where the Xs
denote the particular channel, selected conversion
mode, and power mode.
2) Use a general-purpose I/O line on the CPU to pull
CS low.
3) Transmit TB1 and simultaneously receive a byte
and call it RB1. Ignore RB1.
4) Transmit a byte of all zeros ($00 hex) and simulta-
neously receive byte RB2.
5) Transmit a byte of all zeros ($00 hex) and simulta-
neously receive byte RB3.
6) Pull CS high.
MAX1080/MAX1081
300ksps/400ksps, Single-Supply, Low-Power,
8-Channel, Serial 10-Bit ADCs with Internal Reference
______________________________________________________________________________________
13
10
F
0.1
F
2.5V
VDD1
VDD2
GND
COM
CS
SCLK
DIN
DOUT
SSTRB
SHDN
VDD2
0.01
F
0.01
F
CH7
REFADJ
REF
4.7
F
0 TO
+2.500V
ANALOG
INPUT
OSCILLOSCOPE
CH1
CH2
CH3
CH4
*FULL-SCALE ANALOG INPUT, CONVERSION RESULT = $3FF (HEX)
MAX1080
MAX1081
+3V OR +5V
EXTERNAL CLOCK
SCLK
SSTRB
DOUT*
Figure 5. Quick-Look Circuit
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MAX1081AEUP+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 3V 400ksps Low-Power 8Ch Serial 10-Bit RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1081AEUP+T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 3V 400ksps Low-Power 8Ch Serial 10-Bit RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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