參數(shù)資料
型號: MAX1079ETC+T
廠商: Maxim Integrated Products
文件頁數(shù): 7/18頁
文件大?。?/td> 0K
描述: IC ADC 10BIT 1.5MSPS 12-TQFN
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
位數(shù): 10
采樣率(每秒): 1.5M
數(shù)據接口: MICROWIRE?,QSPI?,串行,SPI?
轉換器數(shù)目: 1
功率耗散(最大): 22mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 12-WQFN 裸露焊盤
供應商設備封裝: 12-TQFN-EP(4x4)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個差分,雙極
MAX1077/MAX1079
1.5Msps, Single-Supply, Low-Power, True-
Differential, 10-Bit ADCs with Internal Reference
______________________________________________________________________________________
15
transmit-data register more than once. For single conver-
sions, idle CNVST high and pulse it low for the entire
conversion. The ADSP21_ _ _ STCTL and SRCTL regis-
ters should be configured for late framing (LAFR = 1)
and for an active-low frame (LTFS = 1, LRFS = 1) signal.
This is also the best way to enter the power-down modes
by setting the word length to 8 bits (SLEN = 1001).
Connect the VL pin to the ADSP21_ _ _ supply voltage
when the MAX1077/MAX1079 are operating with a sup-
ply voltage higher than the DSP supply voltage (see
Figures 17 and 18).
Layout, Grounding, and Bypassing
For best performance, use PC boards. Wire-wrap
boards are not recommended. Board layout should
ensure that digital and analog signal lines are separat-
ed from each other. Do not run analog and digital
(especially clock) lines parallel to one another, or digital
lines underneath the ADC package.
Figure 20 shows the recommended system ground
connections. Establish a single-point analog ground
(star ground point) at GND, separate from the logic
ground. Connect all other analog grounds and DGND
to this star ground point for further noise reduction. The
ground return to the power supply for this ground
should be low impedance and as short as possible for
noise-free operation.
High-frequency noise in the VDD power supply can
affect the ADC’s high-speed comparator. Bypass this
supply to the single-point analog ground with 0.01F
and 10F bypass capacitors. Minimize capacitor lead
lengths for best supply-noise rejection.
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values on
an actual transfer function from a straight line. This
straight line can be either a best-straight-line fit or a line
drawn between the end points of the transfer function,
once offset and gain errors have been nullified. The static
linearity parameters for the MAX1077/MAX1079 are mea-
sured using the end-points method.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1 LSB. A DNL
error specification of 1 LSB or less guarantees no missing
codes and a monotonic transfer function.
Aperture Jitter
Aperture jitter (tAJ) is the sample-to-sample variation in
the time between the samples.
0
D9D8
D7D6
D5D4D3
D2D1
D0
S1
S0
0
DOUT
SCLK
CNVST
0
S0
1
Figure 17. DSP Interface—Continuous Conversion
0
D9
D8
D7
D6
D5
D4
D3
D2D1D0
S1
S0
0
DOUT
SCLK
CNVST
0
1
Figure 18. DSP Interface—Single-Conversion, Continuous/Burst Clock
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