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參數(shù)資料
| 型號： | MAX1064BCEG+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT 400KSPS 24-QSOP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 400k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 762mW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 24-QSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個單端，單極；4 個單端，雙極；2 個偽差分，單極；2 個偽差分，雙極 |
MAX1060/MAX1064
400ksps, +5V, 8-/4-Channel, 10-Bit ADCs
with +2.5V Reference and Parallel Interface
_______________________________________________________________________________________
5
Note 1: Tested at VDD = +5V, COM = GND, unipolar single-ended input mode.
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after offset and gain errors have
been removed.
Note 3: Offset nulled.
Note 4: On channel is grounded; sine wave applied to off channels.
Note 5: Conversion time is defined as the number of clock cycles times the clock period; clock has 50% duty cycle.
Note 6: Input voltage range referenced to negative input. The absolute range for the analog inputs is from GND to VDD.
Note 7: External load should not change during conversion for specified accuracy.
Note 8: When bit 5 is set low for internal acquisition, WR must not return low until after the first falling clock edge of the conversion.
TIMING CHARACTERISTICS (continued)
(VDD = VLOGIC = +5V ±10%, COM = GND, REFADJ = VDD, VREF = +2.5V, 4.7F capacitor at REF pin, fCLK = 7.6MHz (50% duty
cycle), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
3k
3k
DOUT
VLOGIC
a) HIGH-Z TO VOH AND VOL TO VOH
b) HIGH-Z TO VOL AND VOH TO VOL
CLOAD
20pF
CLOAD
20pF
Figure 1. Load Circuits for Enable/Disable Times
tTR
10
40
ns
CLOAD = 20pF, Figure 1
RD Rise to Output Disable
RD Fall to Output Data Valid
tDO
10
50
ns
RD Fall to INT High Delay
tINT1
50
ns
CS Fall to Output Data Valid
tDO2
100
ns
CLOAD = 20pF, Figure 1
tTC
10
60
ns
CLOAD = 20pF, Figure 1
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
CONDITIONS
CS Rise to Output Disable
HBEN Rise to Output Data Valid
tDO1
10
50
ns
CLOAD = 20pF, Figure 1
HBEN Fall to Output Data Valid
tDO1
10
80
ns
CLOAD = 20pF, Figure 1
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| MAX1064BEEG | 功能描述:模數(shù)轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1064BEEG+ | 功能描述:模數(shù)轉換器 - ADC 5V 10Bit 4Ch 400ksps w/2.5V Ref & Prl Int RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1064BEEG+T | 功能描述:模數(shù)轉換器 - ADC 5V 10Bit 4Ch 400ksps w/2.5V Ref & Prl Int RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1064BEEG-T | 功能描述:模數(shù)轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1065 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Low-Power.14-Bit Analog-to-Digital Converters with Parallel Interface |
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