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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | MAX1036EKA+T |
| 寤犲晢锛� | Maxim Integrated Products |
| 鏂囦欢闋佹暩(sh霉)锛� | 11/23闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC ADC 8-BIT 188KSPS SOT23-8 |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1 |
| 浣嶆暩(sh霉)锛� | 8 |
| 閲囨ǎ鐜囷紙姣忕锛夛細 | 188k |
| 鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� | I²C锛屼覆琛� |
| 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩細 | 1 |
| 鍔熺巼鑰楁暎锛堟渶澶э級锛� | 1.75mW |
| 闆诲闆绘簮锛� | 鍠浕婧� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | SOT-23-8 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | SOT-23-8 |
| 鍖呰锛� | 妯�(bi膩o)婧�(zh菙n)鍖呰 |
| 杓稿叆鏁�(sh霉)鐩拰椤炲瀷锛� | 4 鍊�(g猫)鍠锛屽柈妤�锛�4 鍊�(g猫)鍠锛岄洐妤�锛�2 鍊�(g猫)鍋藉樊鍒�锛屽柈妤�锛�2 鍊�(g猫)鍋藉樊鍒嗭紝闆欐サ |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 1395 (CN2011-ZH PDF) |
| 鍏跺畠鍚嶇ū锛� | MAX1036EKA+TDKR |
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MAX1036鈥揗AX1039
External Reference
The external reference can range from 1.0V to VDD. For
maximum conversion accuracy, the reference must be
able to deliver up to 30A and have an output imped-
ance of 1k惟 or less. If the reference has a higher output
impedance or is noisy, bypass it to GND as close to
AIN_/REF as possible with a 0.1F capacitor.
Transfer Functions
Output data coding for the MAX1036鈥揗AX1039 is binary
in unipolar mode and two鈥檚 complement binary in bipolar
mode with 1LSB = (VREF/2N) where N is the number of
bits (8). Code transitions occur halfway between succes-
sive-integer LSB values. Figures 12 and 13 show the
input/output (I/O) transfer functions for unipolar and bi-
polar operations, respectively.
Layout, Grounding, and Bypassing
For best performance, use PC boards. Wire-wrap config-
urations are not recommended since the layout should
ensure proper separation of analog and digital traces. Do
not run analog and digital lines parallel to each other, and
do not lay out digital signal paths underneath the ADC
package. Use separate analog and digital PC board
ground sections with only one star point (Figure 14) con-
necting the two ground systems (analog and digital). For
lowest noise operation, ensure the ground return to the
star ground鈥檚 power supply is low impedance and as
short as possible. Route digital signals far away from sen-
sitive analog and reference inputs.
High-frequency noise in the power supply (VDD) could
influence the proper operation of the ADC鈥檚 fast
comparator. Bypass VDD to the star ground with a
0.1F capacitor located as close as possible to the
MAX1036鈥揗AX1039 power-supply pin. Minimize
capacitor lead length for best supply-noise rejection,
and add an attenuation resistor (5惟) if the power sup-
ply is extremely noisy.
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line can be either a best-straight-line fit or a line
drawn between the endpoints of the transfer function,
once offset and gain errors have been nullified. The INL
is measured using the endpoint method.
SCAN1
SCAN0
SCANNING CONFIGURATION
0
Scans up from AIN0 to the input selected by CS3鈥揅S0 (default setting).
0
1
Converts the input selected by CS3鈥揅S0 eight times.*
Scans up from AIN2 to the input selected by CS1 and CS0. When CS1 and CS0 are set for
AIN0鈥揂IN2, the scanning stops at AIN2 (MAX1036/MAX1037).
10
Scans up from AIN6 to the input selected by CS3鈥揅S0. When CS3鈥揅S0 is set for AIN0鈥揂IN6
scanning stops at AIN6 (MAX1038/MAX1039).
1
Converts the channel selected by CS3鈥揅S0.*
Table 5. Scanning Configuration
*
When operating in external clock mode, there is no difference between SCAN[1:0] = 01 and SCAN[1:0] = 11 and converting continues
until a not acknowledge occurs.
SEL2
SEL1
SEL0
REFERENCE VOLTAGE
AIN_/REF
INTERNAL REFERENCE
STATE
00X
VDD
Analog input
Always Off
0
1
X
External reference
Reference input
Always Off
1
0
Internal reference
Analog input
Auto Shutdown
1
0
1
Internal reference
Analog input
Always On
1
X
Internal reference
Reference output
Always On
Table 6. Reference Voltage and AIN_/REF Format
X = Don鈥檛 care.
2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
4-/12-Channel 2-Wire Serial 8-Bit ADCs
______________________________________________________________________________________
19
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鍙冩暩(sh霉)鎻忚堪 |
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| MAX1036EVKIT | 鍔熻兘鎻忚堪:鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻� IC 闁嬬櫦(f膩)宸ュ叿 RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鐢�(ch菐n)鍝�:Demonstration Kits 椤炲瀷:ADC 宸ュ叿鐢ㄤ簬瑭�(p铆ng)浼�:ADS130E08 鎺ュ彛椤炲瀷:SPI 宸ヤ綔闆绘簮闆诲:- 6 V to + 6 V |
| MAX1036KEKA | 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪:- Cut Tape Product |
| MAX1036KEKA+ | 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪:ADC SGL SAR 188KSPS 8BIT SERL 8PIN SOT-23 - Cut Tape Product |
| MAX1036KEKA+T | 鍔熻兘鎻忚堪:妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 - ADC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁�(sh霉)閲�:2 绲�(ji茅)妲�(g貌u):Sigma-Delta 杞�(zhu菐n)鎻涢€熺巼:125 SPs to 8 KSPs 鍒嗚鲸鐜�:24 bit 杓稿叆椤炲瀷:Differential 淇″櫔姣�:107 dB 鎺ュ彛椤炲瀷:SPI 宸ヤ綔闆绘簮闆诲:1.7 V to 3.6 V, 2.7 V to 5.25 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:VQFN-32 |
| MAX1036KEKA-T | 鍔熻兘鎻忚堪:妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 - ADC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁�(sh霉)閲�:2 绲�(ji茅)妲�(g貌u):Sigma-Delta 杞�(zhu菐n)鎻涢€熺巼:125 SPs to 8 KSPs 鍒嗚鲸鐜�:24 bit 杓稿叆椤炲瀷:Differential 淇″櫔姣�:107 dB 鎺ュ彛椤炲瀷:SPI 宸ヤ綔闆绘簮闆诲:1.7 V to 3.6 V, 2.7 V to 5.25 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:VQFN-32 |
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