參數(shù)資料
型號(hào)： MAX1031BETI+T
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 8/22頁(yè)
文件大?。?/td> 0K
描述： IC ADC 10BIT 300KSPS 28-TQFN-EP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
位數(shù)： 10
采樣率（每秒）： 300k
數(shù)據(jù)接口： MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 1.67W
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 28-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 28-TQFN-EP（5x5）
包裝： 帶卷 (TR)
輸入數(shù)目和類(lèi)型： 16 個(gè)單端，單極；16 個(gè)單端，雙極；8 個(gè)差分，單極；8 個(gè)差分，雙極
MAX1027/MAX1029/MAX1031
10-Bit 300ksps ADCs with FIFO,
Temp Sensor, Internal Reference
16
______________________________________________________________________________________
BIT NAME
BIT
FUNCTION
—
7 (MSB)
Set to zero to select averaging register.
—
6
Set to zero to select averaging register.
—
5
Set to 1 to select averaging register.
AVGON
4
Set to 1 to turn averaging on. Set to zero to turn averaging off.
NAVG1
3
Configures the number of conversions for single channel scans.
NAVG0
2
Configures the number of conversions for single channel scans.
NSCAN1
1
Single channel scan count. (Scan mode 10 only.)
NSCAN0
0 (LSB)
Single channel scan count. (Scan mode 10 only.)
Table 6. Averaging Register*
AVGON
NAVG1
NAVG0
FUNCTION
0
x
Performs 1 conversion for each requested result.
1
0
Performs 4 conversions and returns the average for each requested result.
1
0
1
Performs 8 conversions and returns the average for each requested result.
1
0
Performs 16 conversions and returns the average for each requested result.
1
Performs 32 conversions and returns the average for each requested result.
NSCAN1
NSCAN0
FUNCTION (APPLIES ONLY IF SCAN MODE 10 IS SELECTED)
0
Scans channel N and returns 4 results.
0
1
Scans channel N and returns 8 results.
1
0
Scans channel N and returns 12 results.
1
Scans channel N and returns 16 results.
BIT NAME
BIT
FUNCTION
—
7 (MSB)
Set to zero to select reset register.
—
6
Set to zero to select reset register.
—
5
Set to zero to select reset register.
—
4
Set to 1 to select reset register.
RESET
3
Set to zero to reset all registers. Set to 1 to clear the FIFO only.
x
2
Reserved. Don’t care.
x
1
Reserved. Don’t care.
x
0 (LSB)
Reserved. Don’t care.
Table 7. Reset Register
*
See below for bit details.
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