參數(shù)資料
型號(hào): MAX1003CAX
廠(chǎng)商: Maxim Integrated Products
文件頁(yè)數(shù): 11/12頁(yè)
文件大小: 0K
描述: IC ADC DUAL 6-BIT 90MSPS 36-SSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 30
位數(shù): 6
采樣率(每秒): 90M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 941mW
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 36-BSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 36-SSOP
包裝: 管件
輸入數(shù)目和類(lèi)型: 4 個(gè)單端,單極;2 個(gè)差分,單極
MAX1003
The MAX1003 features a proprietary encoding scheme
that ensures no more than 1LSB dynamic encoding
error. Dynamic encoding errors resulting from
metastable states may occur when the analog input
voltage, at the time the sample is taken, falls close to
the decision point for any one of the input comparators.
The resulting output code for typical converters can be
incorrect, including false full- or zero-scale outputs. The
MAX1003’s unique design reduces the magnitude of
this type of error to 1LSB.
Internal Voltage Reference
An internal buffered bandgap reference is included on
the MAX1003 to drive the ADCs’ reference ladders. The
on-chip reference and buffer eliminate any external
(high-impedance) connections to the reference ladder,
minimizing the potential for noise coupling from exter-
nal circuitry while ensuring that the voltage reference,
input amplifier, and reference ladder track well with
variations of temperature and power supplies.
Oscillator Circuit
The MAX1003 includes a differential oscillator, which is
controlled by an external parallel resonant (tank) net-
work as shown in Figure 6. Alternatively, the oscillator
may be overdriven with an external clock source as
shown in Figure 7.
Internal Clock Operation (Tank)
If the tank circuit is used, the resonant inductor should
have a sufficiently high Q and a self-resonant frequen-
cy (SRF) of at least twice the intended oscillator fre-
quency. Coilcraft’s 1008HS-221, with an SRF of
700MHz and a Q of 45, works well for this application.
Generate different clock frequency ranges by adjusting
varactor and tank elements.
An internal clock-driver buffer is included to provide
sharp clock edges to the internal flash comparators.
The buffer ensures that the comparators are simultane-
ously clocked, maximizing the ADCs’ effective number
of bits (ENOB) performance.
Low-Power, 90Msps, Dual 6-Bit ADC
8
_______________________________________________________________________________________
Figure 6. Tank Resonator Oscillator
Figure 7. External Clock Drive Circuit
MAX1003
CLK
DRIVER
VARACTOR DIODE PAIR IS M/A-COM MA4ST079CK-287 (SOT23 PACKAGE)
INDUCTOR COILCRAFT 1008HS-221.
VTUNE = 0V TO 8V
fOSC = 70MHz TO 110MHz
TNK-
TNK+
VTUNE
220nH
5pF
47pF
47k
10k
MAX1003
CLK
DRIVER
TNK-
VCLK
VCLK = 300mVp-p TO 1.25Vp-p
TNK+
50
50
Z0 = 50
50
0.1
F
0.1
F
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