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參數(shù)資料
| 型號(hào)： | MAT02FH |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 小信號(hào)晶體管 |
| 英文描述： | CONN HEADER 20POS .100 STR 15AU |
| 中文描述： | 20 mA, 40 V, 2 CHANNEL, NPN, Si, SMALL SIGNAL TRANSISTOR, TO-78 |
| 封裝： | METAL CAN-6 |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大小： | 264K |
| 代理商： | MAT02FH |
MAT02
–8–
REV. C
by various offsetting techniques. Protective diodes across each
base-to-emitter junction would normally be needed, but these
diodes are built into the MAT 02. External protection diodes are
therefore not needed.
For the circuit shown in Figure 19, the operational amplifiers
make I
1
= V
X
/R
1
, I
2
= V
Y
/R
2
, I
3
= V
Z
/R
3
, and I
O
= V
O
/R
O
. T he
output voltage for this one-quadrant, log-antilog multiplier/di-
vider is ideally:
V
O
=
R
3
R
O
R
1
R
2
V
X
V
Y
V
Z
(V
X
, V
Y
, V
Z
>
0
)
(4)
If all the resistors (
R
O
,
R
1
,
R
2
,
R
3
) are made equal, then
V
O
=
V
X
V
Y
/
V
Z
. Resistor values of 50 k
to 100 k
are recommended
assuming an input range of 0.1 V to +10 V.
E RROR ANALY SIS
T he base-to-emitter voltage of the MAT 02 in its forward active
operation is:
V
BE
=
kT
qInI
C
S
+ r
BE
I
C
, V
CB
~
0
(5)
T he first term comes from the idealized intrinsic transistor
equation previously discussed (see equation (1)).
With the oscilloscope ac coupled, the temperature dependent
term becomes a dc offset and the trace represents the deviation
from true log conformity. T he bulk resistance can be calculated
from the voltage deviation
V
O
and the change in collector cur-
rent (9 mA):
r
BE
=
V
O
9
mA
×
1
100
(3)
T his procedure finds r
BE
for Side A. Switching R
1
and R
2
will
provide the
r
BE
for Side B. Differential
r
BE
is found by making
R
1
= R
2
.
APPLICAT IONS: NONLINE AR FUNCT IONS
MULT IPLIE R/DIVIDE R CIRCUIT
T he excellent log conformity of the MAT 02 over a very wide
range of collector current makes it ideal for use in log-antilog
circuits. Such nonlinear functions as multiplying, dividing,
squaring, and square-rooting are accurately and easily imple-
mented with a log-antilog circuit using two MAT 02 pairs (see
Figure 19). T he transistor circuit accepts three input currents
(I
1
, I
2
, and I
3
) and provides an output current I
O
according to
I
O
= I
1
I
2
/I
3
. All four currents must be positive in the log-antilog
circuit, but negative input voltages can be easily accommodated
Figure 19. One-Quadrant Multiplier/Divider
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