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參數(shù)資料
| 型號： | MAS7838N |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | SYNCHRONOUS TO ASYNCHRONOUS CONVERTER SAC CMOS |
| 中文描述： | 轉爐同步的異步國資委的CMOS |
| 文件頁數(shù)： | 4/9頁 |
| 文件大?。?/td> | 110K |
| 代理商： | MAS7838N |
DA7838.002
20 September, 2000
4 (9)
33
Timings between synchronous clocks and data are shown below. Note that absolute delays depend on the speed of
the data transmission.
If pin TSL = 1 (Automatic synchronous sampling timing)
2
!""" !"""9
The synchronous start-stop character, TDI (transmitter
data input), is read into the Tx buffer. When the
character is available the data bits are transferred as
TDO (transmitter data output) with the synchronous
timing signal TXC (transmitter clock). The bit rate of TDI
must be the same as the TDO rate within -2.5%...+1%
or -2.5%...+2.3% tolerance depending on XESR
(extended signalling rate) signal. The transmitter adds
extra stop bits to the synchronous data stream, if TDI is
slower than TDO. The over speed is handled by
deleting one stop bit in every 8th character at maximum
in the synchronous output data TDO. When extended
signal rate (XESR = 0) is used 4th stop bit may be
deleted. When the transmitter detects a break signal( at
least M bits of start polarity, where M is length of
character), it sends 2M + 3 bits of start - polarity to
TDO. If the break is longer than 2M + 3 bits, then all bits
are transferred to TDO. After a break signal, at least 2M
bits of stop polarity must be transmitted before sending
further data.
!""" !"""9
The synchronous RDI (receiver data input) is buffered
to recognise the stop and start bits. If a missing stop bit
is detected, it is added to the RDO (receiver data
output). In this case the stop bits are shortened 12.5%
(25% if XESR = 0) during each character. When the
receiver gets at least 2M + 3 bits of start polarity, it does
not add stop bits to RDO. This enables the break signal
to go through the buffer.
"9/-:/!!/-!/#/-
An alternative method to handle the over speed in
asynchronous data is to boost synchronous timing TXC
and RXC by 1-2%. In this mode XHST (higher speed
timing) = 0. In this case there is no need to delete any
stop bits in the transmitter buffer. The break signal goes
through unchanged. On the receiver side the
synchronous data, RDI, is transferred directly to the
asynchronous output RDO with RXC.
T
RXC
T2
T3
RXC
RDI
TXC
TDO
T
TXC
delay
T1
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相關代理商/技術參數(shù) |
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| MAS7838S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SYNCHRONOUS TO ASYNCHRONOUS CONVERTER SAC CMOS |
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| MAS7848L44C | 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:RDS MODEM / MANCHESTER DECODER |
| MAS7A104 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Consumer IC |
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