- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383308 > MAS281 (Dynex Semiconductor Ltd.) MIL-STD-1750A Microprocessor PDF資料下載
參數(shù)資料
| 型號： | MAS281 |
| 廠商： | Dynex Semiconductor Ltd. |
| 英文描述： | MIL-STD-1750A Microprocessor |
| 中文描述： | 符合MIL - STD - 1750A微處理器 |
| 文件頁數(shù)： | 41/55頁 |
| 文件大?。?/td> | 551K |
| 代理商： | MAS281 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁當(dāng)前第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁
MAS281
41/55
8.0 TIMING PARAMETERS
NO.
Parameter
Test Condition
(notes 1 & 9)
Min.
(note 2)
Max.
(note 2)
Units
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
RESET setup to SYNC lo (note 3)
RESET hold after SYNC lo (note 3)
RESET hi to RESET lo (note 3)
OSC hi to SYNC lo
OSC hi to SYNC hi
SYNC lo to SYNC lo (notes 4 & 5)
SYNC lo to AS hi (note 6)
SYNC lo to AS lo
SYNC lo to DS lo (read)
SYNC lo to DS hi (read)
SYNC lo to DS lo (write)
SYNC lo to DS hi (write) (note 5)
SYNC lo to DD lo
SYNC lo to DD hi
SYNC lo to Address valid
Address valid after SYNC lo
SYNC lo to AD Bus Hi-Z (read)
(notes 7 & 10)
SYNC lo to AD Bus active read) (note 10) Load 2
SYNC lo to Data valid (write)
Data valid after SYNC lo (write)
Data set up to SYNC lo (read)
Data hold after SYNC lo (read) (note 8)
SYNC lo to M/IO, RD/VV, IN/OP valid
M/IO, RD/WN, IN/OP valid after SYNC lo Load 1
RDY setup to OSC lo
RDY hold after OSC lo
SYNC lo to DMAE valid
DMAE valid after SYNC lo
DMAR setup to SYNC lo
DMAR hold after SYNC lo
-
-
2
10
10
5
T
- 2
1
T
- 10
2.5
T
- 10
3
T
- 5
10
3
T
- 5
4.5
T
-5
3
T
+ 20
20
-
3
T
+ 15
30
15
-
40
40
5
T
+ 2
1
T
+ 5
2.5
T
+ 15
3
T
+ 20
30
3
T
+ 22
4.5
T
+ 10
3
T
+ 60
60
68
-
ns
ns
SYNC
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 2
Load 2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Load 2
-
15
-
12
20
0
-
5
15
5
-
5
20
10
3
T
+ 50
-
3
T
+ 45
-
-
-
70
-
-
-
75
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
18
19
20
21
22
23
24
25
26
27
28
29
30
Load 2
Load 2
Load 2
Load 1
Load 1
Load 1
NOTES:
Mil-Std-883, method 5005, subgroups 9, 10, 11
1. Unless otherwise noted, test condltions are as follows: OSC duty cycle = 50%, input rise and fall time < 5ns, timing
measured from 50% of VDD points.
2. t = 1 OSC period. 0.5t implies a 50% OSC duty cycle; fractional t’s may be adjusted to reflect actual OSC duty cycle.
3. Data obtained by characterisation or analysis, is not routinely measured.
4. Add 1t for potential branch cycle.
5. Add 1t for internal XIO cycle; nt for n memory wait states.
6. Excluding DMA or HOLD conditions.
7. Measured to pre-Hi-Z steady state
±
10% of VDD.
8. Measurement minus 1x10
-7
in [1-(VlL-0 5/VDD-0.5)] nsecs.
9. Output references SYNC, DMAK, and HLDAK drive into load 1.
10. Guaranteed by component LSI testing: not measured on microprocessor module.
Table 10. Timing Parameters
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX1002 | Low-Power, 60Msps, Dual, 6-Bit ADC |
| MAX1002CAX | Low-Power, 60Msps, Dual, 6-Bit ADC |
| MAX1003 | Low-Power, 90Msps, Dual 6-Bit ADC |
| MAX1003CAX | Low-Power, 90Msps, Dual 6-Bit ADC |
| MAX1005 | IF Undersampler |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAS2901CB | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:RADIATION HARD 4-BIT MICROPROCESSOR SLICE |
| MAS2901CC | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:RADIATION HARD 4-BIT MICROPROCESSOR SLICE |
| MAS2901CD | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:RADIATION HARD 4-BIT MICROPROCESSOR SLICE |
| MAS2901CE | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:RADIATION HARD 4-BIT MICROPROCESSOR SLICE |
| MAS2901CL | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:RADIATION HARD 4-BIT MICROPROCESSOR SLICE |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。