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| 型號： | MAR31751AXXXX |
| 廠商： | DYNEX SEMICONDUCTOR LTD |
| 元件分類： | 存儲控制器/管理單元 |
| 英文描述： | 16-BIT, 256 PAGES, MEMORY MANAGEMENT UNIT, CPGA68 |
| 封裝： | PGA-68 |
| 文件頁數(shù)： | 1/18頁 |
| 文件大?。?/td> | 166K |
| 代理商： | MAR31751AXXXX |
MA31751
1/18
The MA31751 Memory Management Unit/Block Protect
Unit (MMU/BPU) is an optional chip which may be used to
expand the capabilities of the MA31750.
User configurable, the MA31751 can perform as an MMU,
a BPU or both MMU and BPU, conforming to MIL-STD-1750A
and 1750B. MMU mapping and BPU protection for 1M words
of memory is provided by the internal memory.
Up to 16
MA31751 devices can be used to give 16M words of logical
mapped onto 8M words of physical address space with
protection in 1750B mode.
The MA31751 is designed to have a simple interface to
both the CPU and the system bus with the minimal number of
control lines. This reduces board space and simplifies system
design.
The MA31751 traps the MMU and BPU XIO commands to
program and read the logical to physical mapping and memory
access control. This provides simple memory management as
defined by the MIL-STD-1750.
Figure 1: Chip Control Signals
FEATURES
s MlL-STD-1750A/B Compatible
s Radiation Hard CMOS/SOS Technology
s User Configurable as Either a Memory Management Unit
(MMU) or a Block Protect Unit (BPU) or Both
s Memory Management Unit Configuration
1 MWord Physical Address Space
Access Lock and Key of 4K-Word Blocks
Write/Execute Protection of 4K-Word Blocks
s Block Protect Unit Configuration
Protection of 1K-Word Blocks
Global Memory Write Protection During Initialisation
s Direct Memory Access Support
A[0:15]
AS[0:3]
PS[0:3]
OIN
MION
RDWN
ASIN
DSN
DMAKN
CSN
RESETN
VDD
GND
D[0:16]
PRPEN
MPROEN
GLPE
EA[0:10]
EAS
MA31751
CPU
Busses
Bus
Control
Chip
Control
Signals
System
Signals
System
Faults
BPUVALIDN
HITMISSN
MA31751
Memory Management & Block Protection Unit
Replaces January 2000 version, DS4083-3.0
DS4083-3.1 July 2002
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