參數(shù)資料
型號(hào)： MACH131SP-12YC
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： PLD
英文描述： High-Performance EE CMOS Programmable Logic
中文描述： EE PLD, 12 ns, PQFP100
封裝： PLASTIC, QFP-100
文件頁數(shù)： 45/47頁
文件大?。?/td> 1200K
代理商： MACH131SP-12YC
MACH 1 & 2 Families
7
Macrocell
There are two fundamental types of macrocell: the output macrocell and the buried macrocell. The
buried macrocell is only found in MACH 2 devices. The use of buried macrocells effectively
doubles the number of macrocells available without increasing the pin count.
Both macrocell types can generate registered or combinatorial outputs. For the MACH 2 series,
a transparent-low latch conguration is provided. If the register is used, it can be congured as
a T-type or a D-type ip-op. Register and latch functionality is dened in Table 9.
Programmable polarity (for output macrocells) and the T-type ip-op both give the software a
way to minimize the number of product terms needed. These choices can be made automatically
by the software when it ts the design into the device.
Table 7. Logic Allocation for MACH211(SP) and MACH231(SP)
Macrocell
Available Clusters
Macrocell
Available Clusters
Output
Buried
Output
Buried
M0
M1
C0, C1, C2
C0, C1, C2, C3
M8
M9
C7, C8, C9, C10
C8, C9, C10, C11
M2
M3
C1, C2, C3, C4
C2, C3, C4, C5
M10
M11
C9, C10, C11, C12
C10, C11, C12, C13
M4
M5
C3, C4, C5, C6
C4, C5, C6, C7
M12
M13
C11, C12, C13, C14
C12, C13, C14, C15
M6
M7
C5, C6, C7, C8
C6, C7, C8, C9
M14
M15
C13, C14, C15
C14, C15
Table 8. Logic Allocation for MACH221(SP)
Macrocell
Available Clusters
Macrocell
Available Clusters
Output
Buried
Output
Buried
M0
M1
C0, C1, C2
C0, C1, C2, C3
M6
M7
C5, C6, C7, C8
C6, C7, C8, C9
M2
M3
C1, C2, C3, C4
C2, C3, C4, C5
M8
M9
C7, C8, C9, C10
C8, C9, C10, C11
M4
M5
C3, C4, C5, C6
C4, C5, C6, C7
M10
M11
C9, C10, C11
C10, C11
Table 9. Register/Latch Operation
Conguration
D/T
CLK/LE
Q+
D-Register
X
0,1,
↓
Q
0
↑
0
1
↑
1
T-Register
X
0,1,
↓
Q
0
↑
Q
1
↑
Q
Latch
X1
Q
00
0
10
1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MACH131SP-12YI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 HI PERF EE CMOS PLD RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
MACH131SP-14YI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 HI PERF EE CMOS PLD RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
MACH131SP-15VC 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Lattice Semiconductor Corporation 功能描述:
MACH131SP-15YC 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Performance EE CMOS Programmable Logic
MACH131SP-18YI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 HI PERF EE CMOS PLD RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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