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參數(shù)資料
| 型號： | MAC7136MVM40 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PBGA208 |
| 封裝： | 17 X 17 MM, 1 MM PITCH, ROHS COMPLIANT, MAPBGA-208 |
| 文件頁數(shù)： | 45/56頁 |
| 文件大?。?/td> | 1216K |
| 代理商： | MAC7136MVM40 |
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ElectricalCharacteristics
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
Preliminary
Freescale Semiconductor
5
3.3
ESD Protection and Latch-up Immunity
All ESD testing is in conformity with CDF-AEC-Q100 Stress test qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the Human Body
Model (HBM), the Machine Model (MM) and the Charge Device Model.
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise.
A9
Voltage difference VDDA – VRH
VDDA – VRH
–0.3
+6.0
V
A10
Digital I/O Input Voltage
VIN
–0.3
+6.0
V
A11
XFC, EXTAL, XTAL inputs
VILV
–0.3
+3.0
V
A12
TEST input
VTEST
–0.3
— 2
V
Instantaneous Maximum Current 3
A13
Single pin limit for XFC, EXTAL, XTAL 4
I
DL
–25
+25
mA
A14
Single pin limit for all digital I/O pins 5
I
D
–25
+25
mA
A15
Single pin limit for all analog input pins 5
I
DA
–25
+25
mA
A16
Single pin limit for TEST 2
I
DT
–0.25
0
mA
A17
Storage Temperature Range
T
stg
–65
+155
°C
NOTES:
1. The device contains an internal voltage regulator to generate the logic and PLL supply from the I/O supply. The
absolute maximum ratings apply when the device is powered from an external source.
2. This pin is clamped low to VSSX, but not clamped high, and must be tied low in applications.
3. Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,
use the larger of the calculated values using VPOSCLAMP = VDDA + 0.3V and VNEGCLAMP = –0.3 V.
4. These pins are internally clamped to VSSPLL and VDDPLL.
5. All I/O pins are internally clamped to VSSX and VDDX, VSSR and VDDR or VSSA and VDDA.
Table 5. ESD and Latch-up Test Conditions
Model
Description
Symbol
Value
Unit
Human Body
Series Resistance
R1
1500
Ohm
Storage Capacitance
C
100
pF
Number of Pulses per pin
positive
negative
——
3
Machine
Series Resistance
R1
0
Ohm
Storage Capacitance
C
200
pF
Number of Pulse per pin
positive
negative
——
3
Latch-up
Minimum input voltage limit
–2.5
V
Maximum input voltage limit
7.5
V
Table 4. Absolute Maximum Ratings (continued)
Num
Rating
Symbol
Min
Max
Unit
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