參數(shù)資料
型號： MAC7131MVF50
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 50 MHz, RISC MICROCONTROLLER, PBGA208
封裝： 17 X 17 MM, 1 MM PITCH, MAPBGA-208
文件頁數(shù)： 11/48頁
文件大小： 1282K
代理商： MAC7131MVF50
19
MAC7100 Microcontroller Family Hardware Specifications
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Electrical Characteristics
3.9
External Bus Timing Specifications
Table 22 lists processor bus input timings, which are shown in Figure 6, Figure 7 and Figure 8.
NOTE
All processor bus timings are synchronous; that is, input setup/hold and
output delay with respect to the rising edge of a reference clock. The
reference clock is the CLKOUT output.
All other timing relationships can be derived from these values.
Figure 6. General Input Timing Requirements
Table 22. External Bus Input Timing Specifications
Num C
Rating 1
1 Timing specifications have been indicated taking into account the full drive strength for the pads.
Symbol
Min
Max Unit
L1
CLKOUT
tCYC
23
—
ns
Control Inputs
L2a
Control input valid to CLKOUT high 2
2 TA pins are being referred to as control inputs.
tCVCH
13
—
ns
L3a
CLKOUT high to control inputs invalid 2
tCHCII
0—
ns
Data Inputs
L4
Data input (DATA[15:0]) valid to CLKOUT high
tDIVCH
9—
ns
L5
CLKOUT high to data input (DATA[15:0]) invalid
tCHDII
0—
ns
CLKOUT(45MHz)
1.5 V
Valid
Invalid
tSETUP
tHOLD
Input Setup & Hold
Input Rise Time
VH = VIH
VL = VIL
tRISE = 1.5 ns
Input Fall Time
VH = VIH
VL = VIL
tFALL = 1.5 ns
CLKOUT
Inputs
1.5 V
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