參數資料
型號： MAC7111CPV50XX
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： MICROCONTROLLER, PQFP144
封裝： 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, LQFP-144
文件頁數： 28/56頁
文件大?。?/td> 757K
代理商： MAC7111CPV50XX
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
Preliminary
Electrical Characteristics
Freescale Semiconductor
34
3.13.7 CFM Timing Specifications
Table 35 lists the time required to execute various operations described in the Section 3.13.1 through
Section 3.13.6. For operating conditions other than those assumed below, Equation 19 through
Equation 29 must be used to calculate the timing for specific commands under those conditions.
Table 35. CFM Timing Characteristics
Conditions are shown in Table 7 unless otherwise noted
Num C
Rating
Symbol
Min
Typ
Max
Unit
X1
D System Clock
fNVMfsys
0.5
—
50 1
NOTES:
1. Subject to restrictions in Table 19 and Table 20 for operating characteristics of the oscillator and PLL.
MHz
X2
D Bus frequency for Programming or Erase Operations
fNVMfips
1—
—
MHz
X3
D Program/Erase Operating Frequency
fNVMOP
150
—
200
kHz
X4
P Programming Time, 2
Single Word
2. Minimum erase and programming times are achieved with the indicated maximum fSYS (which is fIPS × 2, and subject to the
limits of Table 19 and Table 20) and corresponding maximum fNVMOP. Maximum erase and programming times are
dependent on the combination of fNVMOP and fIPS; values shown are calculated for fIPS = 2 MHz and fNVMOP = 154 KHz.
fSYS = 50 MHz tswpgm
47.1
—
71.0
μs
fSYS = 40 MHz
48.1
—
71.0
X5
D Programming Time, 2
Consecutive Word Burst
fSYS = 50 MHz tbwpgm
20.8
—
30.5
μs
fSYS = 40 MHz
21.3
—
30.5
X6
D Programming Time, 2
32-word Row Burst
fSYS = 50 MHz tbrpgm
693.1
—
1,016.5
μs
fSYS = 40 MHz
706.8
—
1,016.5
X7a P Page Erase Time, 2
Program Flash
fSYS = 50 MHz
terap
21.0
—
26.6
ms
fSYS = 40 MHz
21.3
—
26.6
X7b P Page Erase Time, 2
Data Flash
fSYS = 50 MHz
terad
5.2
—
6.7
ms
fSYS = 40 MHz
5.3
—
6.7
X8
P Mass Erase Time 2
tmass
100
—
130
ms
X9a D Blank Check Time, 3
Program Flash per Block
3. Minimum blank check or page erase verify time assumes the first word in the array is blank and the second is not. Maximum
blank check or page erase verify time assumes the entire block or page is blank.
MAC71x1, MAC71x6tbcheckp
16
—
131,087
tIPS
MAC71x216
—
65,551
X9b D Blank Check Time, 3
Data Flash per Block
tbcheckd
16
—
8,207
tIPS
X9c D Page Erase Verify Time 3
Program Flash
tpevp
16
—
1,039
tIPS
Data Flash
tpevd
16
—
271
X10 D Data Signature Time 4
4. Data signature timing is dependant on the number of words or half-words compressed for the program and data arrays,
respectively. Minimum time is for two words or half-words; maximum time is for the entire array.
MAC71x6, Program
tdsig
17
—
262,159
tIPS
MAC71x1, Program
17
—
131,087
MAC71x2, Program
17
—
65,551
MAC71xx, Data
17
—
16,399
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MAC7131
products
in
208
MAPBGA
packages
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