參數(shù)資料
型號: M95256-MW6P
廠商: 意法半導體
元件分類: EEPROM
英文描述: 256Kbit and 128Kbit Serial SPI Bus EEPROM With High Speed Clock
中文描述: 256Kbit和128Kbit的EEPROM串行SPI總線高速時鐘
文件頁數(shù): 16/39頁
文件大?。?/td> 580K
代理商: M95256-MW6P
M95256, M95128
16/39
(BP1, BP0) bits of the Status Register, are
also hardware protected against data
modification.
Regardless of the order of the two events, the
Hardware Protected Mode (HPM) can be entered:
by setting the Status Register Write Disable
(SRWD) bit after driving Write Protect (W) Low
or by driving Write Protect (W) Low after
setting the Status Register Write Disable
(SRWD) bit.
The only way to exit the Hardware Protected Mode
(HPM) once entered is to pull Write Protect (W)
High.
If Write Protect (W) is permanently tied High, the
Hardware Protected Mode (HPM) can never be
activated, and only the Software Protected Mode
(SPM), using the Block Protect (BP1, BP0) bits of
the Status Register, can be used.
Figure 11. Write Status Register (WRSR) Sequence
C
D
AI02282D
S
Q
2
1
3
4
5
6
7
8
9 10 11 12 13 14 15
High Impedance
Instruction
Status
Register In
0
7
6
5
4
3
2
0
1
MSB
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相關代理商/技術參數(shù)
參數(shù)描述
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