
ADVANCE INFORMATION
Am75PDL191BHHa/Am75PDL193BHHa
128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory
with Enhanced Versatile I/O Control and Dual Chip Enable Input plus, for additional code
or data storage, 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only Simultaneous Read/Write
Flash Memory and 32 Mbit (2 M x 16-Bit) CMOS Pseudo Static RAM
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Refer to AMD’s Website (www.amd.com) for the latest information.
Publication#
30898
Issue Date:
February 6, 2004
Rev:
A
Amendment
2
DISTINCTIVE CHARACTERISTICS
For Code Storage:
Am29PDL127H/Am29PDL129H Features
ARCHITECTURAL ADVANTAGES
■
128 Mbit Page Mode device
— Page size of 8 words: Fast page read access from random
locations within the page
■
Dual Chip Enable inputs (PDL129 only)
— Two CE inputs control selection of each half of the memory
space
■
Single power supply operation
— Full Voltage range: 2.7 to 3.1 volt read, erase, and program
operations for battery-powered applications
■
Simultaneous Read/Write Operation
— Data can be continuously read from one bank while
executing erase/program functions in another bank
— Zero latency switching from write to read operations
■
FlexBank Architecture
— 4 separate banks, with up to two simultaneous operations
per device
PDL127:
— Bank A: 16 Mbit (4 Kw x 8 and 32 Kw x 31)
— Bank B: 48 Mbit (32 Kw x 96)
— Bank C: 48 Mbit (32 Kw x 96)
— Bank D: 16 Mbit (4 Kw x 8 and 32 Kw x 31)
PDL129:
— Bank 1A: 48 Mbit (32 Kw x 96)
— Bank 1B: 16 Mbit (4 Kw x 8 and 32 Kw x 31)
— Bank 2A: 16 Mbit (4 Kw x 8 and 32 Kw x 31)
— Bank 2B: 48 Mbit (32 Kw x 96)
SecSi
TM
(Secured Silicon) Sector region
— Up to 128 words accessible through a command sequence
■
— Up to 64 factory-locked words
— Up to 64 customer-lockable words
■
Both top and bottom boot blocks in one device
■
Manufactured on 0.13 μm process technology
■
20-year data retention at 125°C
■
Minimum 1 million erase cycle guarantee per sector
PERFORMANCE CHARACTERISTICS
■
High Performance
— Page access times as fast as 30 ns
— Random access times as fast as 70 ns
■
Power consumption (typical values at 10 MHz)
— 45 mA active read current
— 25 mA program/erase current
— 1 μA typical standby mode current
SOFTWARE FEATURES
■
Software command-set compatible with JEDEC 42.4
standard
— Backward compatible with Am29F and Am29LV families
■
CFI (Common Flash Interface) complaint
— Provides device-specific information to the system, allowing
host software to easily reconfigure for different Flash devices
■
Erase Suspend / Erase Resume
— Suspends an erase operation to allow read or program
operations in other sectors of same bank
■
Unlock Bypass Program command
— Reduces overall programming time when issuing multiple
program command sequences