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參數(shù)資料
| 型號(hào)： | M74LCX16373DTR2G |
| 廠(chǎng)商： | ON Semiconductor |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC LATCH TRANSP 16BIT 48TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | 74LCX |
| 邏輯類(lèi)型： | D 型透明鎖存器 |
| 電路： | 8:8 |
| 輸出類(lèi)型： | 三態(tài) |
| 電源電壓： | 2 V ~ 3.6 V |
| 獨(dú)立電路： | 2 |
| 延遲時(shí)間 - 傳輸： | 1.5ns |
| 輸出電流高，低： | 24mA，24mA |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 48-TFSOP（0.240"，6.10mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 48-TSSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱(chēng)： | M74LCX16373DTR2GOSDKR |
Semiconductor Components Industries, LLC, 2012
October, 2012 Rev. 11
1
Publication Order Number:
MC74LCX16373/D
MC74LCX16373
Low-Voltage CMOS 16-Bit
Transparent Latch
With 5 VTolerant Inputs and Outputs
(3State, NonInverting)
The MC74LCX16373 is a high performance, noninverting 16bit
transparent latch operating from a 2.3 V to 3.6 V supply. The device is
byte controlled. Each byte has separate Output Enable and Latch Enable
inputs. These control pins can be tied together for full 16bit operation.
High impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
switching noise performance. A VI specification of 5.5 V allows
MC74LCX16373 inputs to be safely driven from 5.0 V devices.
The MC74LCX16373 contains 16 Dtype latches with 3state
5.0 Vtolerant outputs. When the Latch Enable (LEn) inputs are HIGH,
data on the Dn inputs enters the latches. In this condition, the latches are
transparent, i.e., a latch output will change state each time its D input
changes. When LE is LOW, the latches store the information that was
present on the D inputs a setup time preceding the HIGHtoLOW
transition of LE. The 3state outputs are controlled by the Output
Enable (OEn) inputs. When OE is LOW, the outputs are enabled. When
OE is HIGH, the standard outputs are in the high impedance state, but
this does not interfere with new data entering into the latches.
Features
Designed for 2.3 to 3.6 V VCC Operation
5.4 ns Maximum tpd
5.0 V Tolerant Interface Capability With 5.0 V TTL Logic
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0 V
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current in All Three Logic States (20 mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds 500 mA
ESD Performance:
Human Body Model >2000 V
Machine Model >200 V
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
MARKING DIAGRAM
TSSOP48
DT SUFFIX
CASE 1201
1
48
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= PbFree Package
1
48
LCX16373G
AWLYYWW
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
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| 284051-3 | TERM BLOCK PLUG 3POS VERT .400 |
| 284045-3 | TERM BLOCK PLUG 3POS VERT STACK |
| 1-796698-1 | TERM BLOCK HEADER 11POS R/A 5MM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M74LCX16373DTR2G-CUT TAPE | 制造商:ON 功能描述:MC74LCX16373 Series 2.3 to 3.6 V CMOS 16-Bit Transparent Latch - TSSOP-48 |
| M74LCX16374DTR | 制造商:Rochester Electronics LLC 功能描述: 制造商:ON Semiconductor 功能描述: |
| M74LCX16374DTR2G | 功能描述:觸發(fā)器 1.8/2.5/3.3V 16-Bit D-Type RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| M74LS05P | 制造商:MITSU 功能描述: |
| M74LS08P | 制造商:MITSU 功能描述: |
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